linux-headers (unknown)
       1  /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
       2  /*
       3   * linux/can/netlink.h
       4   *
       5   * Definitions for the CAN netlink interface
       6   *
       7   * Copyright (c) 2009 Wolfgang Grandegger <wg@grandegger.com>
       8   *
       9   * This program is free software; you can redistribute it and/or modify
      10   * it under the terms of the version 2 of the GNU General Public License
      11   * as published by the Free Software Foundation
      12   *
      13   * This program is distributed in the hope that it will be useful,
      14   * but WITHOUT ANY WARRANTY; without even the implied warranty of
      15   * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
      16   * GNU General Public License for more details.
      17   */
      18  
      19  #ifndef _CAN_NETLINK_H
      20  #define _CAN_NETLINK_H
      21  
      22  #include <linux/types.h>
      23  
      24  /*
      25   * CAN bit-timing parameters
      26   *
      27   * For further information, please read chapter "8 BIT TIMING
      28   * REQUIREMENTS" of the "Bosch CAN Specification version 2.0"
      29   * at http://www.semiconductors.bosch.de/pdf/can2spec.pdf.
      30   */
      31  struct can_bittiming {
      32  	__u32 bitrate;		/* Bit-rate in bits/second */
      33  	__u32 sample_point;	/* Sample point in one-tenth of a percent */
      34  	__u32 tq;		/* Time quanta (TQ) in nanoseconds */
      35  	__u32 prop_seg;		/* Propagation segment in TQs */
      36  	__u32 phase_seg1;	/* Phase buffer segment 1 in TQs */
      37  	__u32 phase_seg2;	/* Phase buffer segment 2 in TQs */
      38  	__u32 sjw;		/* Synchronisation jump width in TQs */
      39  	__u32 brp;		/* Bit-rate prescaler */
      40  };
      41  
      42  /*
      43   * CAN hardware-dependent bit-timing constant
      44   *
      45   * Used for calculating and checking bit-timing parameters
      46   */
      47  struct can_bittiming_const {
      48  	char name[16];		/* Name of the CAN controller hardware */
      49  	__u32 tseg1_min;	/* Time segment 1 = prop_seg + phase_seg1 */
      50  	__u32 tseg1_max;
      51  	__u32 tseg2_min;	/* Time segment 2 = phase_seg2 */
      52  	__u32 tseg2_max;
      53  	__u32 sjw_max;		/* Synchronisation jump width */
      54  	__u32 brp_min;		/* Bit-rate prescaler */
      55  	__u32 brp_max;
      56  	__u32 brp_inc;
      57  };
      58  
      59  /*
      60   * CAN clock parameters
      61   */
      62  struct can_clock {
      63  	__u32 freq;		/* CAN system clock frequency in Hz */
      64  };
      65  
      66  /*
      67   * CAN operational and error states
      68   */
      69  enum can_state {
      70  	CAN_STATE_ERROR_ACTIVE = 0,	/* RX/TX error count < 96 */
      71  	CAN_STATE_ERROR_WARNING,	/* RX/TX error count < 128 */
      72  	CAN_STATE_ERROR_PASSIVE,	/* RX/TX error count < 256 */
      73  	CAN_STATE_BUS_OFF,		/* RX/TX error count >= 256 */
      74  	CAN_STATE_STOPPED,		/* Device is stopped */
      75  	CAN_STATE_SLEEPING,		/* Device is sleeping */
      76  	CAN_STATE_MAX
      77  };
      78  
      79  /*
      80   * CAN bus error counters
      81   */
      82  struct can_berr_counter {
      83  	__u16 txerr;
      84  	__u16 rxerr;
      85  };
      86  
      87  /*
      88   * CAN controller mode
      89   */
      90  struct can_ctrlmode {
      91  	__u32 mask;
      92  	__u32 flags;
      93  };
      94  
      95  #define CAN_CTRLMODE_LOOPBACK		0x01	/* Loopback mode */
      96  #define CAN_CTRLMODE_LISTENONLY		0x02	/* Listen-only mode */
      97  #define CAN_CTRLMODE_3_SAMPLES		0x04	/* Triple sampling mode */
      98  #define CAN_CTRLMODE_ONE_SHOT		0x08	/* One-Shot mode */
      99  #define CAN_CTRLMODE_BERR_REPORTING	0x10	/* Bus-error reporting */
     100  #define CAN_CTRLMODE_FD			0x20	/* CAN FD mode */
     101  #define CAN_CTRLMODE_PRESUME_ACK	0x40	/* Ignore missing CAN ACKs */
     102  #define CAN_CTRLMODE_FD_NON_ISO		0x80	/* CAN FD in non-ISO mode */
     103  #define CAN_CTRLMODE_CC_LEN8_DLC	0x100	/* Classic CAN DLC option */
     104  #define CAN_CTRLMODE_TDC_AUTO		0x200	/* CAN transiver automatically calculates TDCV */
     105  #define CAN_CTRLMODE_TDC_MANUAL		0x400	/* TDCV is manually set up by user */
     106  
     107  /*
     108   * CAN device statistics
     109   */
     110  struct can_device_stats {
     111  	__u32 bus_error;	/* Bus errors */
     112  	__u32 error_warning;	/* Changes to error warning state */
     113  	__u32 error_passive;	/* Changes to error passive state */
     114  	__u32 bus_off;		/* Changes to bus off state */
     115  	__u32 arbitration_lost; /* Arbitration lost errors */
     116  	__u32 restarts;		/* CAN controller re-starts */
     117  };
     118  
     119  /*
     120   * CAN netlink interface
     121   */
     122  enum {
     123  	IFLA_CAN_UNSPEC,
     124  	IFLA_CAN_BITTIMING,
     125  	IFLA_CAN_BITTIMING_CONST,
     126  	IFLA_CAN_CLOCK,
     127  	IFLA_CAN_STATE,
     128  	IFLA_CAN_CTRLMODE,
     129  	IFLA_CAN_RESTART_MS,
     130  	IFLA_CAN_RESTART,
     131  	IFLA_CAN_BERR_COUNTER,
     132  	IFLA_CAN_DATA_BITTIMING,
     133  	IFLA_CAN_DATA_BITTIMING_CONST,
     134  	IFLA_CAN_TERMINATION,
     135  	IFLA_CAN_TERMINATION_CONST,
     136  	IFLA_CAN_BITRATE_CONST,
     137  	IFLA_CAN_DATA_BITRATE_CONST,
     138  	IFLA_CAN_BITRATE_MAX,
     139  	IFLA_CAN_TDC,
     140  	IFLA_CAN_CTRLMODE_EXT,
     141  
     142  	/* add new constants above here */
     143  	__IFLA_CAN_MAX,
     144  	IFLA_CAN_MAX = __IFLA_CAN_MAX - 1
     145  };
     146  
     147  /*
     148   * CAN FD Transmitter Delay Compensation (TDC)
     149   *
     150   * Please refer to struct can_tdc_const and can_tdc in
     151   * include/linux/can/bittiming.h for further details.
     152   */
     153  enum {
     154  	IFLA_CAN_TDC_UNSPEC,
     155  	IFLA_CAN_TDC_TDCV_MIN,	/* u32 */
     156  	IFLA_CAN_TDC_TDCV_MAX,	/* u32 */
     157  	IFLA_CAN_TDC_TDCO_MIN,	/* u32 */
     158  	IFLA_CAN_TDC_TDCO_MAX,	/* u32 */
     159  	IFLA_CAN_TDC_TDCF_MIN,	/* u32 */
     160  	IFLA_CAN_TDC_TDCF_MAX,	/* u32 */
     161  	IFLA_CAN_TDC_TDCV,	/* u32 */
     162  	IFLA_CAN_TDC_TDCO,	/* u32 */
     163  	IFLA_CAN_TDC_TDCF,	/* u32 */
     164  
     165  	/* add new constants above here */
     166  	__IFLA_CAN_TDC,
     167  	IFLA_CAN_TDC_MAX = __IFLA_CAN_TDC - 1
     168  };
     169  
     170  /*
     171   * IFLA_CAN_CTRLMODE_EXT nest: controller mode extended parameters
     172   */
     173  enum {
     174  	IFLA_CAN_CTRLMODE_UNSPEC,
     175  	IFLA_CAN_CTRLMODE_SUPPORTED,	/* u32 */
     176  
     177  	/* add new constants above here */
     178  	__IFLA_CAN_CTRLMODE,
     179  	IFLA_CAN_CTRLMODE_MAX = __IFLA_CAN_CTRLMODE - 1
     180  };
     181  
     182  /* u16 termination range: 1..65535 Ohms */
     183  #define CAN_TERMINATION_DISABLED 0
     184  
     185  #endif /* !_UAPI_CAN_NETLINK_H */