binutils (2.41)

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(root)/
lib/
libgprofng.a
!<arch>
/               0           0     0     0       319836    `
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F.....................................................................................................................................................................................................................................................................................................................................................................................................................................................ʎʎʎʎʎʎʎʎʎʎʎʎʎʎOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOOSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSS''''''''''''''''''''''''''''''''''''''''''''''''2222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222222(((((((((((((((((((((((((((((((Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(Mr(((((((((((((((((((((((((((((((((((((((((((((()))))))))))))))))))))))))))))))))))))))))))))))))))))))**************************************`*`*`*`*`*`*`*`*`*`*`*`*`*`*`*`*`*`*`*`*`*`*`*`*`*`*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>*>+++++++++++++N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N+N++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,//////////////////////////////h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h/h0
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1Ev_ZN6VectorIP10datatype_tED0Ev_ZN6VectorIP10datatype_tE4typeEv_ZN6VectorIP10datatype_tE4dumpEPKc_ZTI10DefaultMapIlP8Dwr_typeE_ZN10DefaultMapIlP8Dwr_typeED1Ev_ZN10DefaultMapIlP8Dwr_typeED0Ev_ZN10DefaultMapIlP8Dwr_typeE3getElN3MapIlS1_E8RelationE_ZN10DefaultMapIlP8Dwr_typeE6removeEl_ZN10DefaultMapIlP8Dwr_typeE6keySetEv_ZN10DefaultMapIlP8Dwr_typeE6valuesEv_ZTI3MapIlP8Dwr_typeE_ZN3MapIlP8Dwr_typeE6keySetEv_ZN3MapIlP8Dwr_typeE6valuesEv_ZTS6VectorIPN10DefaultMapIlP8Dwr_typeE5EntryEE_ZTS6VectorIP11inst_info_tE_ZTS6VectorIP10SourceFileE_ZTS6VectorIP5DwrCUE_ZTS6VectorIP10datatype_tE_ZTS10DefaultMapIlP8Dwr_typeE_ZTS3MapIlP8Dwr_typeE_ZN6VectorIPN10DefaultMapIlP8Dwr_typeE5EntryEED2Ev_ZN6VectorIP11inst_info_tED2Ev_ZN6VectorIP10SourceFileED2Ev_ZN6VectorIP10datatype_tED2Ev_ZN10DefaultMapIlP8Dwr_typeED2Ev_ZN6VectorIlEC1El_ZN6VectorIlE6appendEl_ZN6VectorIP8Dwr_typeEC1El_ZN6VectorIP8Dwr_typeE6appendES1__ZN6VectorIlEC2El_ZTV6VectorIlE_ZN6VectorIlE6resizeEl_ZN6VectorIP8Dwr_typeEC2El_ZTV6VectorIP8Dwr_typeE_ZN6VectorIP8Dwr_typeE6resizeEl_ZTI6VectorIP8Dwr_typeE_ZN6VectorIP8Dwr_typeED1Ev_ZN6VectorIP8Dwr_typeED0Ev_ZN6VectorIP8Dwr_typeE4typeEv_ZN6VectorIP8Dwr_typeE4dumpEPKc_ZTI6VectorIlE_ZN6VectorIlED1Ev_ZN6VectorIlED0Ev_ZN6VectorIlE4typeEv_ZN6VectorIlE4dumpEPKc_ZTS6VectorIP8Dwr_typeE_ZTS6VectorIlE_ZN6VectorIP8Dwr_typeED2Ev_ZN6VectorIlED2Ev_Z6StrChrPcc_Z7StrRchrPcc_Z12get_basenamePKc_Z10dbe_strdupPKc_ZN5Stabs10is_fortranE12Sp_lang_code_ZN6DwrSec13GetULEB128_32Ev_ZN6DwrSec10GetULEB128Ev_ZN3Elf12elf_getclassEv_ZN10SourceFile12find_dbelineEi_ZN6Module10getMainSrcEv_ZN6VectorIP14DwrInlinedSubrE4dumpEPKc_ZN6VectorIP14DwrInlinedSubrE4sizeEv_ZN6VectorIP14DwrInlinedSubrE3getEl_ZN14DwrInlinedSubr4dumpEv_ZN6VectorIP7DwrLineE4dumpEPKc_ZN6VectorIP7DwrLineE4sizeEv_ZN6VectorIP7DwrLineE3getEl_ZN6VectorIP11DwrFileNameE4dumpEPKc_ZN6VectorIP11DwrFileNameE4sizeEv_ZN6VectorIP11DwrFileNameE3getEl_ZN6DwrSec9GetStringEv_ZN8ElfRelocC2EP3Elf_ZN8ElfRelocC1EP3Elf_ZN8ElfRelocD2Ev_ZN6VectorIPN8ElfReloc6SrelocEE7destroyEv_ZN8ElfRelocD1Ev_ZN8ElfReloc19dump_rela_debug_secEi_ZN8ElfReloc4dumpEv_ZN6VectorIPN8ElfReloc6SrelocEE4sizeEv_ZN6VectorIPN8ElfReloc6SrelocEE5fetchEl_ZN8ElfReloc13get_elf_relocEP3ElfPcPS__ZN6VectorIPN8ElfReloc6SrelocEEC1Ev_ZN6VectorIPN8ElfReloc6SrelocEE6appendES2__ZN6VectorIPN8ElfReloc6SrelocEE4sortEPFiPKvS5_EPv_ZN8ElfReloc14get_reloc_addrEx_ZN5DwrCU16dwr_get_locationEP6DwrSecP11DwrLocation_ZN6DwrSec5Get_8Ev_ZN6DwrSec10GetSLEB128Ev_ZN6DwrSec7GetADDREv_ZN6DwrSec6Get_16Ev_ZN6DwrSec6Get_32Ev_ZN6DwrSec6Get_64Ev_ZN5DwrCU7tag2strEi_ZN5DwrCU6at2strEi_ZN5DwrCU8form2strEi_ZN5DwrCU8lnct2strEi_ZN7Dwr_Tag4dumpEv_ZN8DbeArrayI8Dwr_AttrE3getEl_ZN6DwrSecC2EPhmbb_ZN6DwrSecC1EPhmbb_ZN6DwrSecC2EPS_m_ZN6DwrSecC1EPS_m_ZN6DwrSecD2Ev_ZN6DwrSecD1Ev_ZN6DwrSec16bounds_violationEm_ZN6DwrSec10ReadLengthEv_ZN6DwrSec6Get_24Ev_ZN6DwrSec7GetDataEm_ZN6DwrSec7GetLongEv_ZN6DwrSec10GetADDR_32Ev_ZN6DwrSec10GetADDR_64Ev_ZN6DwrSec6GetRefEv_ZN6DwrSec9get_valueEi_ZN6DwrSec4dumpEPc_ZN11DwrFileNameC2EPc_ZN11DwrFileNameC1EPc_ZN11DwrFileNameD2Ev_ZN11DwrFileNameD1Ev_ZN7DwrLineC2Ev_ZN7DwrLineC1Ev_ZN7DwrLineD2Ev_ZN7DwrLineD1Ev_ZN11DwrLineRegsC2EP5DwarfP6DwrSecPcDW.ref.__gxx_personality_v0_ZN11DwrLineRegs22read_file_names_dwarf5Ev_ZN6VectorIP11DwrFileNameEC1Ev_ZN6VectorIP11DwrFileNameE6appendES1__ZN11DwrLineRegs4dumpEv_ZN11DwrLineRegsC1EP5DwarfP6DwrSecPc_ZN11DwrLineRegsD2Ev_ZN6VectorIP11DwrFileNameE7destroyEv_ZN6VectorIP7DwrLineE7destroyEv_ZN11DwrLineRegsD1Ev_ZN6VectorIP11DwrFileNameEC1El_ZN11DwrLineRegs16DoExtendedOpcodeEv_ZN11DwrLineRegs5resetEv_ZN11DwrLineRegs16DoStandardOpcodeEi_ZN11DwrLineRegs8EmitLineEv_ZN11DwrLineRegs15DoSpecialOpcodeEi_ZN6VectorIP7DwrLineE6appendES1__ZN11DwrLineRegs9get_linesEv_ZN6VectorIP7DwrLineEC1Ev_ZN6VectorIP7DwrLineE4sortEPFiPKvS4_EPv_ZN11DwrLineRegs7getPathEi_ZN6VectorIP11DwrFileNameE5fetchEl_ZN5DwrCUC2EP5Dwarf_ZN5DwrCU17build_abbrevTableEP6DwrSecm_ZN5DwrCUC1EP5Dwarf_ZN5DwrCUD2Ev_ZN6VectorIP14DwrInlinedSubrE7destroyEv_ZN5DwrCUD1Ev_ZN8DbeArrayI14DwrAbbrevTableEC1El_ZN8DbeArrayI8Dwr_AttrEC1El_ZN8DbeArrayI14DwrAbbrevTableE8allocateEi_ZN8DbeArrayI8Dwr_AttrE8allocateEi_ZN8DbeArrayI8Dwr_AttrE4sizeEv_ZN8DbeArrayI8Dwr_AttrE6appendERKS0__ZN8DbeArrayI14DwrAbbrevTableE6appendERKS0__ZN5DwrCU7set_dieEl_ZN8DbeArrayI14DwrAbbrevTableE3getEl_ZN5DwrCU15parse_cu_headerEP10LoadObject_ZN5DwrCU12Dwarf_stringEt_ZN5DwrCU14read_data_attrEtPl_ZN7Dwr_Tag8get_attrEt_ZN5DwrCU11get_high_pcEm_ZN5DwrCU10Dwarf_addrEt_ZN5DwrCU11Dwarf_blockEt_ZN5DwrCU13read_ref_attrEtPl_ZN5DwrCU10Dwarf_dataEt_ZN5DwrCU9Dwarf_refEt_ZN5DwrCU14Dwarf_locationEi_ZN5DwrCU15map_dwarf_linesEP6Module_ZN5DwrCU14get_dwrLineRegEv_ZN6VectorIP10SourceFileE4sizeEv_ZN6VectorIP10SourceFileE3getEl_ZN5DwrCU24parse_inlined_subroutineEP9Dwarf_cnt_ZN6VectorIP14DwrInlinedSubrEC1Ev_ZN14DwrInlinedSubrC1Elmmiii_ZN6VectorIP14DwrInlinedSubrE6appendES1__ZN14DwrInlinedSubrC2Elmmiii_ZN6VectorIPN8ElfReloc6SrelocEED2Ev_ZTV6VectorIPN8ElfReloc6SrelocEE_ZN6VectorIPN8ElfReloc6SrelocEED1Ev_ZN6VectorIPN8ElfReloc6SrelocEED0Ev_ZN6VectorIPN8ElfReloc6Srelo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                                             98        `
BaseMetricTreeNode.o/
CatchOutOfMemory.o/
DbeApplication.o/
DerivedMetrics.o/
SAXParserFactory.o/
Application.o/  0           0     0     644     12200     `
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License GPLv3+: GNU GPL version 3 or later <https://gnu.org/licenses/gpl.html>.
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An alternate spelling for a command is shown in [], where applicable.

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display functions with current metricsdisplay hot PC's with current metricsdisplay hot lines with current metricsdisplay summary metrics for each functiondisplay object list with errors or warningsenable comparison mode for experiments *set the mode for printing tables *display summary metrics for each hot linedisplay summary metrics for each hot PCdisplay annotated source for function/filedisplay annotated disassembly for function/fileset compiler commentary classes for source *set highlight threshold for source *set compiler commentary classes for disasm *set compiler commentary classes for both source and disasm *set highlight threshold for disasm *display the available metrics and dmetrics keywordsset a new list of metricssort tables by the specified metricdisplay the callers-callees for each functiondisplay the tree of function callsrequest calltree flame chart -- not a command, but used in the tabs commanddisplay the available callers-callees metricsdisplay the summary metrics for specified functiondisplay the callers-callees for the specified functionadd specified function to the head of the callstack fragmentadd specified function to the end of the callstack fragmentremove the first function from the callstack fragmentremove the last function from the callstack fragmentdisplay memory leaks, aggregated by callstackdisplay allocations, aggregated by callstackdisplay memory allocations and leaks, aggregated by callstackdisplay heap statistics reportdisplay I/O activity report, aggregated by file namedisplay I/O activity report, aggregated by file descriptordisplay I/O activity report, aggregated by callstackdisplay I/O statistics reportdump race access eventsdump mpi messagesdump mpi function callsdump mpi trace eventsdebug command for internal usedump Java garbage collector eventssend process p signal sdisplay deadlock eventsdisplay summary for the deadlock eventdisplay information about the experimentdisplay the overview of all loaded experimentsdisplay the current sample list with datadisplay the execution statistics datadisplay the existing experimentsdescribe recorded data and tokens available for filtering dataset load objects to show all functions *set load objects to hide functions *set load objects to show API (entry point) only *reset load objects show to defaultsdisplay load objects, functions-shown flagset list of load objects whose functions are showndisplay the list of existing samplesset a new list of samplesdisplay the list of existing threadsset a new list of threadsdisplay the list of existing LWPsset a new list of LWPsdisplay the list of CPUsset a new list of CPUsopen filename for subsequent outputopen filename for subsequent appended outputlimit output to the first n entries (n=0 for no limit)set long/short/mangled names for functions *set viewmode user|expert|machine *enable descendant processes on|off|regex matches lineage or program name $set search path for annotated src/disadd search path for annotated src/dis *remap path prefix for annotated src/dis *set path where the gprofng libraries are installedread er_print commands from script filedisplay processing statisticsadd experiment or groupdrop experimentopen experiment or group (drops all loaded experiments first)display the current release versiondisplay the list of available commandsterminate processing and exitset default function list metrics $set default function list sort metric $set default timeline mode, align, depth $set default timeline visible data $set default visible tabs $set default visible tabs for Thread Analyzer Experiment $display index objects of a specified type with current metricsdisplay list of index objectsdefine a new index object type *display the available index object metricsdisplay instruction-frequency reportrequest timeline -- not a command, but used in the tabs commandrequest mpi-timeline -- not a command, but used in the tabs commandrequest mpi chart -- not a command, but used in the tabs commandrequest dualsource tab -- not a command, but used in the tabs commandrequest source/disassembly tab -- not a command, but used in the tabs commanddump pathtree node tabledump Experiment callstack tablesdump <Unknown> PCsdump functions whose name matches stringdump dataobjects whose name matches stringdump load-object mapdump threads, lwps, cpusdump clock profile eventsdump synchronization trace eventsdump IO trace eventsdump HWC profile eventsdump heap trace eventsignore absence of -xhwcprof info in dataspace profiling $ignore filesystem (nfs, ...) warning $display help including unsupported commandsdisplay the address map with current metricsdisplay segments, indicating which are selectedset a new list of segmentsdefine a filter
Commands controlling the function list:
Commands controlling the callers-callees and calltree lists:
Commands controlling the leak and allocation lists:
Command controlling the I/O activity report:
Commands controlling the race events lists:
Commands controlling the deadlock events lists:equivalent to "memobj type", or "indxobj type"  where type is a memory object or index object type
Commands controlling the source and disassembly listings:
Commands listing experiments, samples and threads:
Commands controlling load object selection:  the special object name `all' refers to all load objects
Commands that list metrics:
Commands that print other displays:
Commands that control output:
Miscellaneous commands:
Commands for experiments (scripts and interactive mode only):
Default-setting commands:
Commands controlling old-style filters/selection:
Commands controlling filters:
Commands controlling the index objects:
Unsupported commands:
Help command:
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HcHHHHHL H@AHXHHHHMEHǸDžPH@։uYHHHHcHHHHHHH8H8HH`xHHX HHHHcHHHHHHHH(H(HHHH0H0uH(HH0HcH`uOHHHH@u	HHHHǸHcH`pHHHHHHǸDžt"PH@։H@9LmLeH]L]LULMLEHEHLxHpHhH`L5HcHHHHLHHAUATSASARAQAPLMHHǸH@HDžSPH@։t	uHH`HH@9|~DHXHHHHщHǸJHDžHHDŽ`HHvH@HH@։)9t$HHHH@HHuLHHHHcHHHHHH@HHL` HHHHcHHHHHHLHHHHHH H t4H H@HHH HtvHgHH@HHLuCHHHH@u	HHH@HHϸH@9<D`H@HIcH`DžPH@։uYHHHHcHHHHHHHHHH`IHL` HHHHcHHHHHHLHHHHHHHuHHHHcH`uOHHHH@u	HHHHǸHcH`AHHHHHHǸA9HpHhH`LHcHHHHLHHHǸHHH`HDžJPH@։uHH`H9|AH@HAu	HHHUdH+%(t81HH@HHHUdH+%(tHHe[A\A]A^A_]UHHH}H}tHEHUHH}HE]int ccm_num_params(COMPMSG_ID)/bb.download/source/binutils-2.41/gprofng/src/comp_com.c0int ccm_paramlist_index(COMPMSG_ID)Ccm_Primtype_t ccm_param_primtype(COMPMSG_ID, int)Ccm_Hitype_t ccm_param_hightype(COMPMSG_ID, int)CCM_MODDATESource file %s, last modified on date %sCCM_COMPVERComponent %s, version %sCCM_COMPDATECompilation date %sCCM_COMPOPTCompilation options %sCCM_ACOMPOPTActual Compilation options %sCCM_VAR_ALIASVariable %s aliased to %sCCM_FBIRDIFFProfile feedback data inconsistent with intermediate representation file; check compiler version, flags and source fileCCM_OPTRED_SWAPOptimization level for %s reduced from %d to %d due to insufficient swap spaceCCM_OPTRED_CPLXOptimization level for %s reduced from %d to %d due to program complexityCCM_UNKNOWNUnexpected compiler comment %dCCM_UNPAR_CALLLoop below not parallelized because it contains a call to %sCCM_PAR_SERBoth serial and parallel versions generated for loop belowCCM_PAR_SER_VERBoth serial and parallel versions generated for loop below; with parallel version used if %s, serial otherwiseCCM_PAR_DRECTVLoop below parallelized by explicit user directiveCCM_APARLoop below autoparallelizedCCM_AUTOPARLoop below autoparallelized; equivalent explict directive is %sCCM_UNPAR_DDLoop below could not be parallelized because of a data dependency on %sCCM_UNPAR_DDALoop below could not be parallelized because of a data dependency or aliasing of %sCCM_UNPAR_ANONDDLoop below could not be parallelized because of an anonymous data dependencyCCM_UNPAR_ANONDDALoop below could not be parallelized because of an anonymous data dependency or aliasingCCM_PAR_WORKLoop below parallelized, but might not contain enough work to be efficiently run in parallelCCM_UNPAR_EXITLoop below not parallelized because it contains multiple exit pointsCCM_UNPAR_STRNGLoop below not parallelized because it contains a strange flow of controlCCM_UNPAR_IOLoop below not parallelized because it contains I/O or other MT-unsafe callsCCM_PAR_BODY_NAMEParallel loop-body code is in function %sCCM_UNPAR_NLOOPIDXLoop below not parallelized because loop index not foundCCM_UNPAR_DRECTVLoop below not parallelized because of explicit user directiveCCM_UNPAR_NOTPROFITLoop below not parallelized because it was not profitable to do soCCM_UNPAR_NESTLoop below not parallelized because it was nested in a parallel loopCCM_UNPARLoop below not parallelizedCCM_UNPAR_NOAUTOLoop below not parallelized because autoparallelization is not enabledCCM_PR_L_VARPrivate variables in loop below: %sCCM_SH_L_VARShared variables in loop below: %sCCM_TP_L_VARThreadprivate variables in loop below: %sCCM_RV_L_VARReduction variables in loop below: %sCCM_IM_L_VARImplicit variables in loop below: %sCCM_PR_O_VARPrivate variables in OpenMP construct below: %sCCM_SH_O_VARShared variables in OpenMP construct below: %sCCM_TP_O_VARThreadprivate variables in OpenMP construct below: %sCCM_RV_O_VARReduction variables in OpenMP construct below: %sCCM_IM_O_VARImplicit variables in OpenMP construct below: %sCCM_UNPAR_IN_OMPLoop below not parallelized because it is inside an OpenMP regionCCM_FP_O_VARFirstprivate variables in OpenMP construct below: %sCCM_LP_O_VARLastprivate variables in OpenMP construct below: %sCCM_CP_O_VARCopyprivate variables in OpenMP construct below: %sCCM_PR_OAS_VARVariables autoscoped as PRIVATE in OpenMP construct below: %sCCM_SH_OAS_VARVariables autoscoped as SHARED in OpenMP construct below: %sCCM_FP_OAS_VARVariables autoscoped as FIRSTPRIVATE in OpenMP construct below: %sCCM_LP_OAS_VARVariables autoscoped as LASTPRIVATE in OpenMP construct below: %sCCM_RV_OAS_VARVariables autoscoped as REDUCTION in OpenMP construct below: %sCCM_FAIL_OAS_VARVariables cannot be autoscoped in OpenMP construct below: %sCCM_SERIALIZE_OASOpenMP parallel region below is serialized because autoscoping has failedCCM_UNPAR_CALL_2%s not parallelized because it contains calls to: %sCCM_PAR_DRECTV_2%s parallelized by explicit user directiveCCM_APAR_2%s autoparallelizedCCM_AUTOPAR_2%s autoparallelized; equivalent explict directive is %sCCM_UNPAR_DD_2%s could not be parallelized because of data dependences on: %sCCM_UNPAR_DDA_2%s could not be parallelized because of a data dependence or aliasing of: %sCCM_UNPAR_ANONDD_2%s could not be parallelized because of an anonymous data dependenceCCM_UNPAR_ANONDDA_2%s could not be parallelized because of an anonymous data dependence or aliasingCCM_PAR_WORK_2%s parallelized, but might not contain enough work to run efficiently in parallelCCM_UNPAR_EXIT_2%s not parallelized because it contains multiple exit pointsCCM_UNPAR_STRANGE_2%s not parallelized because it contains a strange flow of controlCCM_UNPAR_IO_2%s not parallelized because it contains I/O or other MT-unsafe callsCCM_PAR_BODY_NAME_2%s parallel loop-body code placed in function %s along with %d inner loopsCCM_UNPAR_NLOOPIDX_2%s not parallelized because loop index not foundCCM_UNPAR_DRECTV_2%s not parallelized because of explicit user directiveCCM_UNPAR_NOTPROFIT_2%s not parallelized because it was not profitable to do soCCM_UNPAR_NEST_2%s not parallelized because it was nested within a parallel loopCCM_UNPAR_2%s not parallelizedCCM_UNPAR_NOAUTO_2%s not parallelized because autoparallelization is not enabledCCM_PR_L_VAR_2Private variables in %s: %sCCM_SH_L_VAR_2Shared variables in %s: %sCCM_TP_L_VAR_2Threadprivate variables in %s: %sCCM_RV_L_VAR_2Reduction variables of operator %s in %s: %sCCM_IM_L_VAR_2Implicit variables in %s: %sCCM_PR_O_VAR_2CCM_SH_O_VAR_2CCM_TP_O_VAR_2CCM_RV_O_VAR_2CCM_IM_O_VAR_2CCM_UNPAR_IN_OMP_2%s not parallelized because it is inside OpenMP region %sCCM_FP_O_VAR_2Firstprivate variables in %s: %sCCM_LP_O_VAR_2Lastprivate variables in %s: %sCCM_CP_O_VAR_2Copyprivate variables in %s: %sCCM_PR_OAS_VAR_2Variables autoscoped as PRIVATE in %s: %sCCM_SH_OAS_VAR_2Variables autoscoped as SHARED in %s: %sCCM_FP_OAS_VAR_2Variables autoscoped as FIRSTPRIVATE in %s: %sCCM_LP_OAS_VAR_2Variables autoscoped as LASTPRIVATE in %s: %sCCM_RV_OAS_VAR_2Variables autoscoped as REDUCTION of operator %s in %s: %sCCM_FAIL_OAS_VAR_2Variables treated as shared because they cannot be autoscoped in %s: %sCCM_SERIALIZE_OAS_2%s will be executed by a single thread because autoscoping for some variables was not successfulCCM_QPERMVECIs %s a permutation vector during execution of %s?CCM_QEXPRIs expression %s true for %s?CCM_QSAFECALLIs subroutine %s MP-safe as used in %s?CCM_LCOSTLoop below estimated to cost %d cycles per iterationCCM_UNROLLLoop below unrolled %d timesCCM_IMIXLoop below has %d loads, %d stores, %d prefetches, %d FPadds, %d FPmuls, and %d FPdivs per iterationCCM_SPILLSLoop below required %d integer register spills, %d FP register spills, and used %d integer registers and %d FP registersCCM_LFISSIONLoop below fissioned into %d loopsCCM_LPEELLoop below had iterations peeled off for better unrolling and/or parallelizationCCM_LBLOCKEDLoop below blocked by %d for improved cache performanceCCM_LTILEDLoop below tiled for better performanceCCM_LUNRJAMLoop below unrolled and jammedCCM_LWHILE2DOBounds test for loop below moved to top of loopCCM_L2CALLLoop below replaced by a call to %sCCM_LDEADLoop below deleted as dead codeCCM_LINTRCHNGLoop below interchanged with loop on line %dCCM_FUSEDTOLoop below fused with loop on line %dCCM_FUSEDFROMLoop from line %d fused with loop belowCCM_VECINTRNSCLoop below transformed to use calls to vector intrinsic %sCCM_LSTRIPMINELoop below strip-minedCCM_LNEST2LOOPSLoop below collapsed with loop on line %dCCM_LREVERSELoop below has had its iteration direction reversedCCM_IMIX2Loop below has %d loads, %d stores, %d prefetches, %d FPadds, %d FPmuls, %d FPdivs, %d FPsubs, and %d FPsqrts per iterationCCM_LUNRFULLLoop below fully unrolledCCM_ELIM_NOAMORTINSTLoop below was eliminated as it contains no non-amortizable instructionsCCM_COMP_DALIGNPerformance of loop below could be improved by compiling with -dalignCCM_INTIMIXLoop below has %d int-loads, %d int-stores, %d alu-ops, %d muls, %d int-divs and %d shifts per iterationCCM_LMULTI_VERSION%s multi-versioned.  Specialized version is %sCCM_LCOST_2%s estimated to cost %d cycles per iterationCCM_UNROLL_2%s unrolled %d timesCCM_IMIX_B%s has %d loads, %d stores, %d prefetches, %d FPadds, %d FPmuls, and %d FPdivs per iterationCCM_SPILLS_2%s required %d integer register spills, %d FP register spills, and used %d integer registers and %d FP registersCCM_LFISSION_2%s fissioned into %d loops, generating: %sCCM_LFISSION_FRAG%s contains code from lines: %sCCM_LPEEL_2%s had iterations peeled off for better unrolling and/or parallelizationCCM_LBLOCKED_2%s blocked by %d for improved memory hierarchy performance, new inner loop %sCCM_LOUTER_UNROLL%s is outer-unrolled %d times as part of unroll and jamCCM_LJAMMEDAll %d copies of %s are fused together as part of unroll and jamCCM_LWHILE2DO_2Bounds test for %s moved to top of loopCCM_L2CALL_2%s replaced by a call to %sCCM_LDEAD_2%s deleted as dead codeCCM_LINTRCHNG_2%s interchanged with %sCCM_LINTRCHNG_ORDERFor loop nest below, the final order of loops after interchanging and subsequent transformations is: %sCCM_FUSED_2%s fused with %s, new loop %sCCM_VECINTRNSC_2%s transformed to use calls to vector intrinsics: %sCCM_LSTRIPMINE_2%s strip-mined by %d, new inner loop %sCCM_LNEST2LOOPS_2%s collapsed with %s, new loop %sCCM_LREVERSE_2%s has had its iteration direction reversedCCM_IMIX2_B%s has %d loads, %d stores, %d prefetches, %d FPadds, %d FPmuls, %d FPdivs, %d FPsubs, and %d FPsqrts per iterationCCM_LUNRFULL_2%s fully unrolledCCM_ELIM_NOAMORTINST_2%s was eliminated as it contains no non-amortizable instructionsCCM_COMP_DALIGN_2Performance of %s could be improved by compiling with -dalignCCM_INTIMIX_2%s has %d int-loads, %d int-stores, %d alu-ops, %d muls, %d int-divs and %d shifts per iterationCCM_OMP_REGIONSource OpenMP region below has tag %sCCM_LMICROVECTORIZE%s is micro-vectorizedCCM_LMULTI_VERSION_2%s multi-versioned for %s. Specialized version is %sCCM_LCLONED%s cloned for %s.  Clone is %sCCM_LUNSWITCHED%s is unswitched.  New loops are %s and %sCCM_LRESWITCHEDLoops %s and %s and their surrounding conditional code have been merged to form loop %sCCM_LSKEWBLOCKED%s skew-blocked by %d with slope %d for improved memory hierarchy performance, new inner loop %sCCM_IVSUBInduction variable substitution performed on %sCCM_ONEITER_REPLACED%s determined to have a trip count of 1; converted to straight-line codeCCM_IMIX3_B%s has %d loads, %d stores, %d prefetches, %d FPadds, %d FPmuls, %d FPmuladds, %d FPdivs, and %d FPsqrts per iterationCCM_PIPELINELoop below pipelinedCCM_PIPESTATSLoop below scheduled with steady-state cycle count = %dCCM_NOPIPE_CALLLoop could not be pipelined because it contains callsCCM_NOPIPE_INTCCLoop could not be pipelined because it sets multiple integer condition codes.CCM_NOPIPE_MBARLoop could not be pipelined because it contains a memory barrier instructionCCM_NOPIPE_MNMXLoop could not be pipelined because it contains a minimum or a maximum operationCCM_NOPIPE_U2FLTLoop could not be pipelined because it contains an unsigned to float conversionCCM_NOPIPE_GOTLoop could not be pipelined because it sets the Global Offset Table pointerCCM_NOPIPE_IDIVLoop could not be pipelined because it contains an integer divideCCM_NOPIPE_PRFTCHLoop could not be pipelined because it contains a prefetch operationCCM_NOPIPE_EXITLoop could not be pipelined because it contains an exit operationCCM_NOPIPE_REGLoop could not be pipelined because it contains instructions that set the %%gsr or %%fsr registerCCM_NOPIPE_UNSLoop could not be pipelined because it has an unsigned loop counterCCM_NOPIPE_UNSUITLoop was unsuitable for pipeliningCCM_NOPIPE_INTRINSICLoop could not be pipelined because it has an intrinsic call to %sCCM_NOPIPE_BIGLoop could not be pipelined as it is too bigCCM_NOPIPE_INVINTPRLoop could not be pipelined as it contains too many loop invariant integers = %dCCM_NOPIPE_INVFLTPRLoop could not be pipelined as it contains too many loop invariant floats = %dCCM_NOPIPE_INVDBLPRLoop could not be pipelined as it contains too many loop invariant doubles = %dCCM_PIPE_SCHEDAFIPRLoop below was adversely affected by high integer register pressure = %dCCM_PIPE_SCHEDAFDPRLoop below was adversely affected by high double register pressure = %dCCM_PIPE_SCHEDAFFPRLoop below was adversely affected by high float register pressure = %dCCM_NOPIPE_INTPRLoop could not be pipelined due to high integer register pressure = %dCCM_NOPIPE_DBLPRLoop could not be pipelined due to high double register pressure = %dCCM_NOPIPE_FLTPRLoop could not be pipelined due to high float register pressure = %dCCM_PIPELINE_2%s pipelinedCCM_PIPESTATS_2%s scheduled with steady-state cycle count = %dCCM_NOPIPE_CALL_2%s could not be pipelined because it contains callsCCM_NOPIPE_INTCC_2%s could not be pipelined because it sets multiple integer condition codes.CCM_NOPIPE_MBAR_2%s could not be pipelined because it contains a memory barrier instructionCCM_NOPIPE_MNMX_2%s could not be pipelined because it contains a minimum or a maximum operationCCM_NOPIPE_U2FLT_2%s could not be pipelined because it contains an unsigned to float conversionCCM_NOPIPE_GOT_2%s could not be pipelined because it sets the Global Offset Table pointerCCM_NOPIPE_IDIV_2%s could not be pipelined because it contains an integer divideCCM_NOPIPE_PRFTCH_2%s could not be pipelined because it contains a prefetch operationCCM_NOPIPE_EXIT_2%s could not be pipelined because it contains an exit operationCCM_NOPIPE_REG_2%s could not be pipelined because it contains instructions that set the %%gsr or %%fsr registerCCM_NOPIPE_UNS_2%s could not be pipelined because it has an unsigned loop counterCCM_NOPIPE_UNSUIT_2%s is unsuitable for pipeliningCCM_NOPIPE_INTRINSIC_2%s could not be pipelined because it contains a call to intrinsic %sCCM_NOPIPE_BIG_2%s could not be pipelined as it is too bigCCM_NOPIPE_INVINTPR_2%s could not be pipelined as it contains too many loop invariant integers = %dCCM_NOPIPE_INVFLTPR_2%s could not be pipelined as it contains too many loop invariant floats = %dCCM_NOPIPE_INVDBLPR_2%s could not be pipelined as it contains too many loop invariant doubles = %dCCM_PIPE_SCHEDAFIPR_2%s was adversely affected by high integer register pressure = %dCCM_PIPE_SCHEDAFDPR_2%s was adversely affected by high double register pressure = %dCCM_PIPE_SCHEDAFFPR_2%s was adversely affected by high float register pressure = %dCCM_NOPIPE_INTPR_2%s could not be pipelined due to high integer register pressure = %dCCM_NOPIPE_DBLPR_2%s could not be pipelined due to high double register pressure = %dCCM_NOPIPE_FLTPR_2%s could not be pipelined due to high float register pressure = %dCCM_INLINEFunction %s inlined from source file %s into the code for the following lineCCM_INLINE2Function %s inlined from source file %s into inline copy of function %sCCM_INLINE_TMPLTFunction %s inlined from template file %s into the code for the following lineCCM_INLINE_TMPLT2Function %s inlined from template file %s into inline copy of function %sCCM_INLINE_OUT_COPYOut-of-line copy of inlined function %s from source file %s generatedCCM_NINLINE_RECRecursive function %s inlined only up to depth %dCCM_NINLINE_NESTFunction %s not inlined because inlining is already nested too deeplyCCM_NINLINE_CMPLXFunction %s not inlined because it contains too many operationsCCM_NINLINE_FBFunction %s not inlined because the profile-feedback execution count is too lowCCM_NINLINE_PARFunction %s not inlined because it contains explicit parallel pragmasCCM_NINLINE_OPTFunction %s not inlined because it is compiled with optimization level <= 2CCM_NINLINE_USRFunction %s not inlined because either command line option or source code pragma prohibited it, or it's not safe to inline itCCM_NINLINE_AUTOFunction %s not inlined because doing so would make automatic storage for %s too largeCCM_NINLINE_CALLSFunction %s not inlined because it contains too many callsCCM_NINLINE_ACTUALFunction %s not inlined because it has more actual parameters than formal parametersCCM_NINLINE_FORMALFunction %s not inlined because it has more formal parameters than actual parametersCCM_NINLINE_TYPEFunction %s not inlined because formal argument type does not match actual typeCCM_NINLINE_ATYPEFunction %s not inlined because array formal argument does not match reshaped array actual argument typeCCM_NINLINE_RETTYPEFunction %s not inlined because return type does not matchCCM_NINLINE_EXCPTFunction %s not inlined because it guarded by an exception handlerCCM_NINLINE_UNSAFEFunction %s not inlined because it might be unsafe (call alloca(), etc)CCM_NINLINE_ALIASFunction %s not inlined because inlining it will make the alias analysis in the calling function more conservativeCCM_NINLINE_FEMARKFunction %s not inlined because it contains setjmp/longjmp, or indirect goto, etcCCM_NINLINE_RAREXFunction %s not inlined because it is known to be rarely executedCCM_CLONINGFunction %s from source file %s cloned, creating cloned function %s; constant parameters propagated to cloneCCM_INLINE_BFunction %s inlined from source file %s into the code for the following line.  %d loops inlinedCCM_INLINE2_BFunction %s inlined from source file %s into inline copy of function %s.  %d loops inlinedCCM_INLINE_LOOPLoop in function %s, line %d has tag %sCCM_NINLINE_MULTIENTRYFunction %s not inlined because it contains an ENTRY statementCCM_NINLINE_VARARGSFunction %s not inlined because variable argument routines cannot be inlinedCCM_NINLINE_UNSEEN_BODYFunction %s not inlined because the compiler has not seen the body of the function.  Use -xcrossfile or -xipo in order to inline itCCM_NINLINE_UPLEVELFunction %s not inlined because it is a nested routine containing references to variables defined in an outer functionCCM_NINLINE_CMDLINEFunction %s not inlined because either -xinline or source code pragma prohibited itCCM_NINLINE_CALL_CMPLXCall to %s not inlined because of the complexity of the calling routineCCM_NINLINE_LANG_MISMATCHCall to %s not inlined because it is in a different languageCCM_NINLINE_RTN_WEAKFunction %s not inlined because it is marked weakCCM_NINLINE_CALL_WEAKFILECall to %s not inlined because it is in a different file and it contains a call to a weak routineCCM_NINLINE_CALL_TRYCATCHCall to %s not inlined because it is in a different file and contains an explicit try/catchCCM_NINLINE_CALL_REGPCall to %s not inlined because it would cause excessive register pressureCCM_NINLINE_RTN_REGPFunction %s not inlined because it would cause excessive register pressureCCM_NINLINE_CALL_XPENSVCall to %s not inlined because analysis exceeds the compilation time limitCCM_NINLINE_READONLYIRFunction %s not inlined because it is in a file specified as read-only by -xipo_archive=readonly and it contains calls to static functionsCCM_NINLINE_CALL_THUNKCall to %s not inlined because it is in a compiler-generated function that does not permit inliningCCM_NINLINE_CALL_XTARGETSIndirect callsite has too many targets; callsite marked do not inlineCCM_NINLINE_SELFTAIL_RECURSIVEFunction %s not inlined because of a recursive tail-call to itselfCCM_NINLINE_PRAGMAFunction %s not inlined because it contains explicit parallel or alias pragmasCCM_NINLINE_CMPLX2Function %s not inlined because it contains too many operations.  Increase max_inst_hard in order to inline it: -xinline_param=max_inst_hard:nCCM_NINLINE_RAREFunction %s not inlined because the call is rarely executedCCM_NINLINE_PAR2Function %s not inlined because it is called within a region guarded by an explicit parallel pragmasCCM_NINLINE_G_LIMITFunction %s not inlined because it would exceed the permitted global code size growth limit.  Try to increase max_growth in order to inline it: -xinline_param=max_growth:nCCM_NINLINE_L_LIMITFunction %s not inlined because it would exceed the maximum function size growth limit.  Increase max_function_inst in order to inline it: -xinline_param=max_function_inst:nCCM_NINLINE_REC2Recursive function %s is inlined only up to %d levels and up to %d size.  Increase max_recursive_deptha or max_recursive_inst in order to inline it: -xinline_param=max_recursive_depth:n, -xinline_param=max_recursive_inst:nCCM_NINLINE_FB2Function %s not inlined because the profile-feedback execution count is too low.  Decrease min_counter in order to inline it: -xinline_param:min_counter:nCCM_NINLINE_CS_CMPLXFunction %s not inlined because called function's size is too big.  Increase max_inst_soft in order to inline it: -xinline_param=max_inst_soft:nCCM_NINLINE_R_EXCPTFunction %s not inlined because it contains an exception handlerCCM_NINLINE_ASMFunction %s not inlined because it contains asm statementsCCM_NINLINE_R_READONLYIRFunction %s not inlined because it is in a file specified as read-only by -xipo_archive=readonly and it is a static functionCCM_NINLINE_C_READONLYIRCall to %s not inlined because the calling function is in a file specified as read-only by -xipo_archive=readonlyCCM_NINLINE_NEVERRETURNFunction %s not inlined because it never returnsCCM_MPREFETCHPrefetch of %s insertedCCM_MPREFETCH_LDPrefetch of %s inserted for load at %sCCM_MPREFETCH_STPrefetch of %s inserted for store at %sCCM_MPREFETCH_FBPrefetch of %s inserted based on feedback dataCCM_MPREFETCH_FB_LDPrefetch of %s inserted for load at %s based on feedback dataCCM_MPREFETCH_FB_STPrefetch of %s inserted for store at %s based on feedback dataCCM_MLOADLoad below refers to %sCCM_MSTOREStore below refers to %sCCM_MLOAD_PLoad below refers to %s, and was prefetched at %sCCM_MSTORE_PStore below refers to %s, and was prefetched at %sCCM_COPYINParameter %d caused a copyin in the following callCCM_COPYOUTParameter %d caused a copyout in the following callCCM_COPYINOUTParameter %d caused both a copyin and copyout in the following callCCM_PADDINGPadding of %d bytes inserted before array %sCCM_PADCOMMONPadding of %d bytes inserted before array %s in common block %sCCM_ALIGN_EQVariable/array %s can not be double-aligned, because it is equivalencedCCM_ALIGN_PERFAlignment of variables in common block may cause performance degradationCCM_ALIGN_STRUCTAlignment of component %s in numeric sequence structure %s may cause performance degradationCCM_TMP_COPYArgument %s copied to a temporaryCCM_TMP_COPYMArgument %s might be copied to a temporary; runtime decision madeCCM_PROC_MISMATCHArgument %d to subprogram %s differs from reference on line %dCCM_PROC_MISMATCH2Scalar argument %d to subprogram %s is referred to as an array on line %dCCM_PROC_MISMATCH3Return type/rank from subprogram %s differs from return on line %dCCM_DO_EXPRDO statement bounds lead to no executions of the loopCCM_AUTO_BNDThe bounds for automatic variable %s are not available at all entry points; zero-length variable might be allocatedCCM_LIT_PADThe character string literal %s padded to the length specified for the dummy argumentCCM_ARRAY_LOOPArray statement below generated a loopCCM_ARRAY_LOOPNESTArray statement below generated %d nested loopsCCM_ALIGN_PERF2Alignment of variable %s in common block %s may cause a performance degradationCCM_ALIGN_PERF3Alignment of variable %s in blank common may cause a performance degradationCCM_IO_LOOP_ARRAYI/O implied do item below generated an array sectionCCM_TMPCONSTImplicit invocation of class %s constructor for temporaryCCM_TMPDESTImplicit invocation of class %s destructor for temporaryCCM_DBL_CONSTDouble constant %s used in float expressionCCM_MINLINEFunction %s inlined from source file %s by front-endCCM_MINLINE2Function %s from source file %s inlined into inline copy of method %s by front-endCCM_MINLINE3Function %s not inlined because it uses keyword %sCCM_MINLINE4Function %s not inlined because it is too complexCCM_TMP_COPYOUTArgument %s copied from a temporaryCCM_TMP_COPYOUTMArgument %s might be copied from a temporary; runtime decision madeCCM_TMP_COPYINOUTArgument %s copied in and out of a temporaryCCM_TMP_COPYINOUTMArgument %s might be copied in and out of a temporary; runtime decision madeCCM_ARRAY_LOOP_2Array statement below generated loop %sCCM_ARRAY_LOOPNEST_2Array statement below generated %d nested loops: %sCCM_IO_LOOP_ARRAY_2I/O implied do item below generated an array section: %sCCM_USER_LOOPSource loop below has tag %sCCM_FOUND_LOOPDiscovered loop below has tag %sCCM_MFUNCTION_LOOPCopy in M-function of loop below has tag %sCCM_FSIMPLETransformations for fsimple=%d appliedCCM_STACKFunction %s requires %d Mbytes of stack storageCCM_TAILRECURRecursive tail call in %s optimized to jump to entry pointCCM_TAILCALLCall to function %s was tail-call optimizedCCM_NI_EXIT_OR_PSEUDOTemplate could not be early inlined because it contains the pseudo instruction %sCCM_NI_BAD_UNARY_OPCTemplate could not be early inlined because it contains the instruction opcode %sCCM_NI_INT_LDD_ON_V9Template could not be early inlined because it contains integer ldd instructions, which are deprecated in the v9 architectureCCM_NI_LATE_INL_OPCCCM_NI_BAD_IMM_OPTemplate could not be early inlined because the relocation or immediate operand %s is not well understood by the optimizerCCM_NI_BAD_STATELEAFTemplate could not be early inlined because it references the state register %sCCM_NI_BAD_ASR_19Template could not be early inlined because %%asr19 is not supported in pre v8plus codeCCM_NI_BAD_FSR_USETemplate could not be early inlined because references to %%fsr can only be optimized when the -iaopts flag is usedCCM_NI_BAD_REGISTERTemplate could not be early inlined because it references the register %sCCM_NI_NO_RET_VALTemplate could not be early inlined because it does not return the value declaredCCM_NI_DELAYTemplate could not be early inlined because it contains a non nop delay slotCCM_NI_SCALLTemplate could not be early inlined because it calls a function which returns a structureCCM_CASE_POSITIONCase block below was placed at position %d based on execution frequencyCCM_CALL_WITH_CODECall to %s replaced with inline code.  %d loops created: %sCCM_NI_BAD_SP_ADDRTemplate could not be early inlined because it contains a %%sp+reg addressCCM_NI_BAD_SP_USAGETemplate could not be early inlined because it uses/defines the stack pointer in a non-load/store instructionCCM_NI_MIXED_REG_TYPESTemplate could not be early inlined because it contains register %s used as both x-register and register pairWarning: improperly formatted compiler commentary message (%d parameters >= %d);
  please report this bug against the compiler
Warning, improperly formatted compiler commentary message (parameter count mismatch = %d, param# = %d, msg_type = %x, `%s');
  please report this bug against the compiler
0x%08llx0x%016llxWarning, improperly formatted compiler commentary message (unexpected primitive type %d);
  please report this bug against the compiler
Warning: improperly formatted compiler commentary message (msg->nparam=%d plist_idx=%d);
  please report this bug against the compiler
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	 ATSTAMPETSTAMPTSTAMPTHRIDLWPIDCPUIDFRINFOEVT_TIMESMPLOBJSAMPLEGCEVENTOBJGCEVENTVOIDP_OBJUCPUSCPUTRAPTFLTDFLTKFLTULCKTSLPWCPUTSTPMSTATENTICKOMPSTATESRQSTSOBJHWCTAGHWCINTVADDRPADDRVIRTPCPHYSPCLWP_LGRP_HOMEPS_LGRP_HOMEEA_PAGESIZEEA_LGRPPC_PAGESIZEPC_LGRPHWCDOBJMEM_LATMEM_SRCHTYPEHSIZEHVADDRHOVADDRLeaked bytesHLEAKEDHMEM_USAGEFreed bytesHFREEDCurrent allocationsHCUR_ALLOCSHCUR_NET_ALLOCCurrent leaksHCUR_LEAKSDDSCR_LNKIOTYPEIOFDIONBYTEIORQSTIOOFDIOFNAMEIOVFDIOFSTYPECPRIDPPRIDTSKIDPTSKIDPRPCRIDRTYPELEAFPCRVADDRRCNTDIDDLTYPEDTYPEDVADDRSTACKMSTACKUSTACKXSTACKHSTACKSTACKIDJava thread numberJTHREADLEAFDOBJSAMPLE_MAPGCEVENT_MAPProcess idPIDExperiment idEXPIDComparable Experiment IdEXPID_CMPComparison Group idEXPGRIDPARREGStart Timestamp (nanoseconds)TSTAMP_LOEnd Timestamp (nanoseconds)TSTAMP_HITSTAMP2CPU Frequency, MHzFREQ_MHZClock Profiling Interval, MicrosecondsNTICK_USECIOHEAPBYTESSTACKLMSTACKLUSTACKLXSTACKLSTACKIMSTACKIUSTACKIXSTACKI(unknown)((EXPID_CMP<<%llu) | THRID)ThreadsCPUs(CPUID)Samples(SAMPLE_MAP)GCEvents(GCEVENT_MAP)Seconds(TSTAMP/1000000000)Processes(EXPID_CMP)((EXPGRID<<%llu) | (EXPID<<%llu))Experiment_IDsDatasize(IOHEAPBYTES==0?0:((IOHEAPBYTES<=(1<<0)?(1<<0):((IOHEAPBYTES<=(1<<2)?(1<<2):((IOHEAPBYTES<=(1<<4)?(1<<4):((IOHEAPBYTES<=(1<<6)?(1<<6):((IOHEAPBYTES<=(1<<8)?(1<<8):((IOHEAPBYTES<=(1<<10)?(1<<10):((IOHEAPBYTES<=(1<<12)?(1<<12):((IOHEAPBYTES<=(1<<14)?(1<<14):((IOHEAPBYTES<=(1<<16)?(1<<16):((IOHEAPBYTES<=(1<<18)?(1<<18):((IOHEAPBYTES<=(1<<20)?(1<<20):((IOHEAPBYTES<=(1<<22)?(1<<22):((IOHEAPBYTES<=(1<<24)?(1<<24):((IOHEAPBYTES<=(1<<26)?(1<<26):((IOHEAPBYTES<=(1<<28)?(1<<28):((IOHEAPBYTES<=(1<<30)?(1<<30):((IOHEAPBYTES<=(1<<32)?(1<<32):((IOHEAPBYTES<=(1<<34)?(1<<34):((IOHEAPBYTES<=(1<<36)?(1<<36):((IOHEAPBYTES<=(1<<38)?(1<<38):((IOHEAPBYTES<=(1<<40)?(1<<40):((IOHEAPBYTES<=(1<<42)?(1<<42):((IOHEAPBYTES<=(1<<44)?(1<<44):((IOHEAPBYTES<=(1<<46)?(1<<46):((IOHEAPBYTES<=(1<<48)?(1<<48):((IOHEAPBYTES<=(1<<50)?(1<<50):(IOHEAPBYTES==-1?-1:(1<<50|1)))))))))))))))))))))))))))))))))))))))))))))))))))))))Duration((TSTAMP_HI-TSTAMP_LO)==0?0:(((TSTAMP_HI-TSTAMP_LO)<=1000?1000:(((TSTAMP_HI-TSTAMP_LO)<=10000?10000:(((TSTAMP_HI-TSTAMP_LO)<=100000?100000:(((TSTAMP_HI-TSTAMP_LO)<=1000000?1000000:(((TSTAMP_HI-TSTAMP_LO)<=10000000?10000000:(((TSTAMP_HI-TSTAMP_LO)<=100000000?100000000:(((TSTAMP_HI-TSTAMP_LO)<=1000000000?1000000000:(((TSTAMP_HI-TSTAMP_LO)<=10000000000?10000000000:(((TSTAMP_HI-TSTAMP_LO)<=100000000000?100000000000:(((TSTAMP_HI-TSTAMP_LO)<=1000000000000?1000000000000:(((TSTAMP_HI-TSTAMP_LO)<=10000000000000?10000000000000:(10000000000001))))))))))))))))))))))))/bin/rm -rf /bin/rm -rf %s/tmp/analyzer.%llu.%lld%s/%s<Total><Scalars><Unknown>./<no Java callstack recorded><JVM-System><Truncated-stack><Stack-unwind-failed><OMP><OMP-overhead><OMP-idle><OMP-reduction><OMP-implicit_barrier><OMP-explicit_barrier><OMP-lock_wait><OMP-critical_section_wait><OMP-ordered_section_wait><OMP-atomic_wait>r#analyzer experiment group%sSP_ANALYZER_DISCARD_TINY_EXPERIMENTS.erdata.frameinfo: Experiment has warnings, see header for details
Experiment has warnings, see experiment panel for details
Has %d descendant(s), use commands controlling selection to load descendant data
Has %d descendant(s), use filter panel to load descendant data
Group %d.ergCan not drop subexperimentsHistable* DbeSession::createHistObject(Histable::Type)/bb.download/source/binutils-2.41/gprofng/src/DbeSession.cc0t%s%s TimeError: Invalid number entered: %s
Default selection "1" made
Available name list:
%8d) Cancel
%8d) %s
%8d) %s %s:0x%llx (%s)
%8d) %s %s:0x%llx
%8d) %s(%s)
Enter selection: Error: Invalid number entered:
MAIN_Segment %d -- %s -- %s


 End Segment %d -- %s -- %s


Master list of DataObjects:
id %6lld: [%4lld] parent = %6lld, offset = %+4lld %s
id %6lld: [%4lld] %s  master=%lld  master=??  MASTER Experiment %d -- %s
No index object type name has been specified.Index Object type name %s does not begin with an alphabetic characterIndex Object type name %s contains a non-alphanumeric characterMemory/Index Object type name %s is already definedNo index-expr has been specified.Index Object index expression is invalid: %sNONEINT32UINT32INT64UINT64STRINGDOUBLEOBJECTDATEBOOLENUMFK_LABELLabelsFK_EVTPROPMisc. DefinitionsFK_IDXOBJIndex Object Definitions^%s$%s
%2d %s
======END of mlist[%d] =========
basic_string: construction from null is not validITEM Vector<ITEM>::remove(long int) [with ITEM = DbeView*]/bb.download/source/binutils-2.41/gprofng/src/vec.hindex >= 0index < countITEM Vector<ITEM>::remove(long int) [with ITEM = ExpGroup*]ITEM Vector<ITEM>::remove(long int) [with ITEM = Experiment*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = BaseMetric*]index <= countITEM Vector<ITEM>::remove(long int) [with ITEM = Countable*]Value_t StringMap<Value_t>::remove(const char*) [with Value_t = DbeJarFile*]/bb.download/source/binutils-2.41/gprofng/src/StringMap.hValue_t StringMap<Value_t>::remove(const char*) [with Value_t = DbeFile*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = StringMap<DbeJarFile*>::Entry*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = StringMap<DbeFile*>::Entry*]UHH H}HE#HEH@HUHHHHHEHEH@H9E|HEH@UHH}HE@L]UHH}HEH@X]UHH}HE@h]UHH}HEH@@]UHH}HE0
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No instruction frequency data available
Instruction frequency data from experiment %s

void DbeView::add_subexperiment(int, bool)/bb.download/source/binutils-2.41/gprofng/src/DbeView.ccindex == dataViews->size ()void DbeView::add_experiment(int, bool)EXPGRID==1Not a real function; no source or disassembly available.Source location not recorded in experimentObject name not recorded in experimentHist_data* DbeView::get_hist_data(MetricList*, Histable::Type, int, Hist_data::Mode, Vector<Histable*>*, Histable*, Vector<Histable*>*, PathTree::PtreeComputeOption)bm1 != NULLInvalid filter specification `%s'
1 || EXPID==EXPID>= && EXPID<=0(EXPID== && ())
USERSYSTEMTRAPTFAULTDFAULTKFAULTUSER_LOCKSLEEPWAIT_CPUSTOPPEDLINUX_CPUKERNEL_CPU
Total Clock Profiling Packets:  %d Experiment:  %s
Unexpected mstate = %d#%6ld: %lld, %3lld.%09lld (%4lld.%09lld) t = %d, cpu = %d, frames = %d
    mstate = %d (%s), nticks = %d
          %s [0x%016llx]

No Clock Profiling Packets in Experiment:  %s

Total Synctrace Packets:  %d Experiment:  %s
       synchronization object @ 0x%016llx;  synchronization delay  %3lld.%09lld

No Synctrace Packets in Experiment:  %s

Total IO trace Packets:  %d Experiment:  %s
ReadTraceWriteTraceOpenTraceCloseTraceOtherIOTraceReadTraceErrorWriteTraceErrorOpenTraceErrorCloseTraceErrorOtherIOTraceErrorUnknownIOTraceType    %s: fd = %d, ofd = %d, vfd = %lld, fstype = %d, rqst =  %3lld.%09lld
    filename = `%s', nbytes = %d

No IO trace Packets in Experiment:  %s

Total HW Counter Profiling Packets:  %d Experiment:  %s
<invalid> $$#%6ld: %lld, %3lld.%09lld (%4lld.%09lld) t = %d, cpu = %d, frames = %d
       count = %10lld (0x%016llx), tag = %d (%s)%s
       va = 0x%016llx, pa = 0x%016llx

No HWC Profiling Packets in Experiment:  %s
mallocfreereallocmmapmunmap
Total Heaptrace Packets:  %d Experiment:  %s
    type = %d (%s), size = %llu (0x%llx), VADDR = 0x%016llx, OVADDR = 0x%016llx

No Heaptrace Packets in Experiment:  %s
# No GC events in experiment %d, %s (PID %d, %s)
# %li events in experiment %d: %s (PID %d, %s)
# exp:idx     GC_start,        GC_end,   GC_duration
%5d:%d, %3lld.%09lld, %3lld.%09lld, %3lld.%09lld
Data not available for this filter selectionUnable to open fileData corruptedFunctions/Modules information corruptedNo selected object, bring up Functions TabITEM Vector<ITEM>::remove(long int) [with ITEM = FilterSet*]/bb.download/source/binutils-2.41/gprofng/src/vec.hindex >= 0index < countITEM Vector<ITEM>::remove(long int) [with ITEM = Vector<DataView*>*]UHH}H}tHEH]UHHH}HE/HUHHH}H}tHEHUHHH}HuH}t#H}tHUHEHHH}tUHH}HE@]UHH}HEH@]UHH}]UHHH}HuHUHEHHt
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 internal error (`%s')%s: No warning%s: Experiment was written to a filesystem of type `%s'; data may be distorted%s: Profiling interval was changed from requested %s (microsecs.) used%s: Experiment size limit exceeded%s: SIGPROF handler was changed (%s) during the run; profile data may be unreliable%s: Periodic sampling rate adjusted %s microseconds%s: Application's attempt to set interval timer period to %s was ignored; its behavior may be changed%s: Collection interval timer period was changed (%s); profile data may be unreliable%s: SIGEMT handler was changed during the run; profile data may be unreliable%s: libcpc access blocked for hardware counter profiling%s: vfork(2) replaced by %s; execution may be affected%s: exec environment augmented with %s missing collection variables%s: target installed handler for sample signal %s; samples may be lost%s: target installed handler for pause/resume signal %s; data may be lost or unexpected%s: unable to reserve HW counters; data may be distorted by other users of the counters%s: application ran with a libthread version that may distort data; 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HEHHENULL %s/%srMALLOCFREEREALLOCMMAPMUNMAPmallocfreereallocmmapmunmapREADWRITEOPENCLOSEOTHERIOREADERRORWRITEERROROPENERRORCLOSEERROROTHERIOERRORReadWriteOpenCloseOther I/ORead errorWrite errorOpen errorClose errorOther I/O errorexperimentversion*** Error: experiment %s version %d.%d is not supported;
use the version of the tools that recorded the experiment to read itcollectorsettinglimitblkszstackbasehwc_defaultnoidle*** Note: experiment does not have events from idle CPUsfaketime*** Note: experiment does not have timestamps; timeline unavailabledelay_startterminatepause_signalsample_periodsample_signalsearch_pathSearch path: %slinetracecollenv  Data collection environment variable: %sXXX Unexpected setting found; %d attributes:
XXX      %s = %s
systemhostnameosSunOSarchi86pci686x86_64aarch64pagesznpagespowermfrequencyclkfrequency_scalingturbo_modecpuprocesswsizepidppidpgrpsidcwdeventtstampkindruntimearchive_runer_archive run: XXXXXXXsampleidlabelexitcerroreccwarncommenttext*** Note: %sdesc_startvariantlineagefollowmsgdesc_startedexec_startexec_errorjthread_startnamegrpnameprntnametidjthrjenvjthread_endgc_endgc_startpausePause: %ld.%09ldPause (%s): %ld.%09ldresumeResume: %ld.%09ldthread_pauseThread %llu pause: %ld.%09ldthread_resumeThread %llu resume: %ld.%09ldmapvaddrsizefoffsetmodeschksumobjectsegmentLinuxKernelfunctiondynfuncDYNAMIC_FUNCTIONSfuncnamejcmmethodIdunmapprofilenumstatesptimerUSERSYSTEMTRAPTFAULTDFAULTKFAULTUSER_LOCKSLEEPWAIT_CPUSTOPPEDLINUX_CPUKERNEL_CPUUser CPUSystem CPUTrap CPUText Page FaultData Page FaultKernel Page FaultUser LockSleepWait CPUStoppedUser+System CPUKernel CPUMSTATEThread stateNTICKNumber of Profiling Ticksheaptraceiotracesynctracethresholdscopeomptracehwcountercpuverhwcnameint_nameintervaltagmemopmodstrhwsimctrmetricreg_numtimecvtdversionjprofilejversiondataraceschemedeadlockdataptrprofdatafnamehwcountersprofpcktfieldtypeINT32UINT32INT64UINT64STRINGDOUBLEDATEformatunamenoshow*** Error: data parsing failed. Log file is corrupted.offsetstatevaluedtracefatal*** Warning: unrecognized element %s%s -- %s%s%s at line %d, column %dcommentqrunlogqerrorqwarnqnotesqpprocqExperiment Ended: %ld.%09ld
Data Collection Duration: %ld.%09ld*** Note: experiment was not closed*** Error: log file in experiment cannot be read*** Error: log does not show target starting*** Error: log file in experiment could not be parsed*** Warning: system has variable clock frequency, which may cause variable execution times and inaccurate conversions of cycle counts into time.<COMP_EXE_NAME>notesNotes:============================================================wwarnings.xml%s: %slog.xmlInstructions Per CycleIPCinsts/cyclesCycles Per InstructionCPIcycles/instsKernel Instructions Per CycleK_IPCK_insts/K_cyclesKernel Cycles Per InstructionK_CPIK_cycles/K_instscmdrelativelbl_ts%s %slabels.xmlAfter sortUserLabels:startarchives%s/../%s%.*s%s%.*s.class%.*s<Unknown>jclassesarchive file malformed %s%s.%smap.xml*** Warning: Segment `%s' loaded with same address, size as `%s' [0x%llx-0x%llx]
*** Warning: Segment %s [0x%llx-0x%llx] overlaps %s [0x%llx-0x%llx], which has been implicitly unloadedLoading CallStack Data: %sdata.frameinfoOMP_pregOpenMP Parallel RegionCPRIDImplicit OpenMP Parallel RegionProcessing OpenMP Parallel Region Data: %s*** Warning: circular links in OMP regions; data may not be correct.OMP_taskOpenMP TaskTSKIDOpenMP Task from Implicit Parallel RegionProcessing OpenMP Task Data: %s*** Warning: circular links in OMP tasks; data may not be correct.Loading OpenMP Data: %sifreqifreqqLoading Profile Data: %sEVT_TIMEEvent durationLoading Synctrace Data: %sLoading HW Profile Data: %sDataDescriptor* Experiment::get_hwc_events()/bb.download/source/binutils-2.41/gprofng/src/Experiment.cc0Warning: experiment %s has %.1f%%%% (%lld of %lld) dataspace events that were accepted
  without verification; data may be incorrect or misleading
  recompile with -xhwcprof and rerecord to get better data
Warning: experiment %s has %.1f%%%% (%lld of %lld) dataspace events that could not be verified
  recompile with -xhwcprof and rerecord to get better data
WARNING: Too many invalid HW counter profile events (%ld/%ld = %3.2f%%) in experiment %d (`%s'); data may be unreliableLoading IO Trace Data: %sIOVFDVirtual File Descriptor<stdin><stdout><stderr><Other IO activity><pipe(), socket(), or other fds>N/ALoading Heap Trace Data: %sHLEAKEDBytes LeakedHMEM_USAGEHeap Memory UsageHFREEDBytes FreedHCUR_ALLOCSNet Bytes AllocatedHCUR_LEAKSNet Bytes LeakedHCUR_NET_ALLOCDDSCR_LNKVOIDP_OBJTSTAMP2End Timestamp (nanoseconds)SAMPLE=%s (id=%d) MEMUSE=%lld TSTAMP=%lld
Loading Race Data: %sdataracesLoading Deadlocks Data: %sdeadlocksSMPLOBJTSTAMPHigh resolution timestampSAMPLESample numberGCEVENTOBJGCEVENTGCEvent numberExperiment started %s32-bit64-bit
Target command (%s): '%s'Process pid %d, ppid %d, pgrp %d, sid %dUser: `%s'Current working directory: %s???Collector version: `%s'; experiment version %d.%d (%s)Kernel driver version: `%s'JVM version: `%s'unknownHost `%s', OS `%s', page size %d, architecture `%s'  %d CPUs, with clocks ranging from %d to %d MHz.; max of %d MHz. assumeds  %d CPU%s, clock speed %d MHz.  Memory: %d pages @  %d = %lld MB.  Machine model: %s
Experiment start not recordedData collection parameters:  Clock-profiling, interval = %d microsecs.Native- and Java-APIsJAVA-APIsNative-APIs  Synchronization tracing, threshold = %d microsecs. (calibrated); %s  Synchronization tracing, threshold = %d microsecs.; %s  Heap tracing  IO tracingdual-stacksingle-stackleaf  Datarace detection, %s  Deadlock detection  HW counter-profiling (default); counters:  HW counter-profiling; counters:    %s, tag %d, interval %d, memop %d  Periodic sampling, %d secs.  Experiment size limit, %d  Follow descendant processes from: %s  Pause signal %s  Sample signal %s  Data collection delay start %s seconds  Data collection termination after %s secondser_print: Experiment::readPacket: Error in data: src=%llx greater than %llx
  WARNING: There are %d invalid packet(s) in the %s fileoverviewWarning: overview data file can't be read<unknown>FRINFOTHRIDMSTACKMachine Call StackUSTACKUser Call StackXSTACKExpert Call StackHSTACKShowHide Call StackJTHREADJava ThreadOMPSTATEOpenMP stateNOOVHDWORKIBAREBARIDLESERLRDUCLKWTCTWTODWTATWTTSKWTNoneOverheadWorkImplicit BarrierExplicit BarrierIdleSerialReductionLock WaitCritical Section WaitOrdered Section WaitAtomic WaitTask Waitvoid Experiment::resolve_frame_info(DataDescriptor*)type == TYPE_OBJOpenMP parallel regionOpenMP taskProcessing CallStack Data%s %s: %s*** Warning: %d frameinfo packets are missing from total of %d when resolving %s..er*** Error: not a valid experiment name*** Error: experiment not found*** Error: experiment was recorded with an earlier version, and can not be readM_rUnable to create directory `%s'
.er/_%.*s/%s0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ-_./%.*s%c%s_%s%s%c%sdyntextint Experiment::read_dyntext_file()ds != NULLProcessing Dynamic Text: %sDataDescriptor* Experiment::newDataDescriptor(int, int, DataDescriptor*)data_id >= 0 && data_id < DATA_LASTExperiment %s
Address         Size (hex)              Load time     Unload time    Checksum  Name
0x%08llx  %8lld (0x%08llx) %5lld.%09lld %5lld.%09lld  "%s"
er_archive: unable to copy `%s': %s
er_archive: cannot access file `%s': %s
er_archive: unable to open `%s': %s
Copying `%s'  to `%s'
er_archive: unable to write %d bytes to `%s': %s
er_archive: remove %s
er_archive: Internal error: file name is NULL
er_archive: Internal error: file name in archive is NULL
er_archive: Internal error: path to common archive is NULL
.er_archive: Fatal error: pathconf(".", _PC_PATH_MAX) failed
er_archive: Fatal error: unable to allocate memory
er_archive: Fatal error: cannot determine current directory
er_archive: Fatal error: %s
er_archive: Fatal error: get_cksum(%s) returned %d
%s/%u_%ser_archive: Fatal error: pathconf(%s, _PC_PATH_MAX) failed
er_archive: file path is too long - truncated:%s
er_archive: Fatal error: pathconf(%s, _PC_NAME_MAX) failed
er_archive: file name is too long - truncated:%s
%s/archive_%llxer_archive: Fatal error: cannot copy file %s to temporary file: %s
er_archive: Fatal error: rename(%s, %s) returned error: %d
er_archive: Fatal error: symlink(%s, %s) returned error: %d (errno=%s)
Created symbolic link %s to file in common archive: %s
er_archive: Internal error: file does not exist in common archive: %s
er_archive: Fatal error: cannot copy file %s to common archive %s
zip:jar:file:file:ITEM Vector<ITEM>::remove(long int) [with ITEM = Experiment::ExperimentHandler::Element]/bb.download/source/binutils-2.41/gprofng/src/vec.hindex >= 0index < countITEM Vector<ITEM>::remove(long int) [with ITEM = Sample*]ITEM Vector<ITEM>::remove(long int) [with ITEM = long long unsigned int]ITEM Vector<ITEM>::remove(long int) [with ITEM = GCEvent*]ITEM Vector<ITEM>::remove(long int) [with ITEM = Function*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = Histable*]index <= countvoid Vector<ITEM>::insert(long int, ITEM) [with ITEM = DefaultMap<long int, FileData*>::Entry*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = DefaultMap<int, long int>::Entry*]Value_t DefaultMap<Key_t, Value_t>::remove(Key_t) [with Key_t = unsigned int; Value_t = Map<long long int, void*>*]/bb.download/source/binutils-2.41/gprofng/src/DefaultMap.hValue_t DefaultMap<Key_t, Value_t>::remove(Key_t) [with Key_t = unsigned int; Value_t = Map<long long int, long unsigned int>*]Value_t StringMap<Value_t>::remove(const char*) [with Value_t = SourceFile*]/bb.download/source/binutils-2.41/gprofng/src/StringMap.hValue_t StringMap<Value_t>::remove(const char*) [with Value_t = DbeFile*]Value_t DefaultMap<Key_t, Value_t>::remove(Key_t) [with Key_t = int; Value_t = long int]Value_t DefaultMap<Key_t, Value_t>::remove(Key_t) [with Key_t = long int; Value_t = FileData*]Value_t DefaultMap2D<Key1_t, Key2_t, Value_t>::remove(Key1_t, Key2_t) [with Key1_t = unsigned int; Key2_t = long long int; Value_t = void*]/bb.download/source/binutils-2.41/gprofng/src/DefaultMap2D.hValue_t DefaultMap2D<Key1_t, Key2_t, Value_t>::remove(Key1_t, Key2_t) [with Key1_t = unsigned int; Key2_t = long long int; Value_t = long unsigned int]Value_t StringMap<Value_t>::remove(const char*) [with Value_t = LoadObject*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = DefaultMap<unsigned int, Map<long long int, void*>*>::Entry*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = DefaultMap<unsigned int, Map<long long int, long unsigned int>*>::Entry*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = StringMap<SourceFile*>::Entry*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = StringMap<DbeFile*>::Entry*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = StringMap<LoadObject*>::Entry*]Value_t DefaultMap<Key_t, Value_t>::remove(Key_t) [with Key_t = long long int; Value_t = long unsigned int]Value_t IntervalMap<Key_t, Value_t>::remove(Key_t) [with Key_t = long long int; Value_t = long unsigned int]/bb.download/source/binutils-2.41/gprofng/src/IntervalMap.hValue_t DefaultMap<Key_t, Value_t>::remove(Key_t) [with Key_t = long long int; Value_t = void*]Value_t IntervalMap<Key_t, Value_t>::remove(Key_t) [with Key_t = long long int; Value_t = void*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = DefaultMap<long long int, long unsigned int>::Entry*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = IntervalMap<long long int, long unsigned int>::Entry*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = DefaultMap<long long int, void*>::Entry*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = IntervalMap<long long int, void*>::Entry*]Y@$@@UHH}H}tHEH]UHHH}HE/HUHHH}H}tHEHUHHH}H}tHEHUHHH}HuH}t#H}tHUHEHHH}tUHH}HuHMH&.HHHHH?H)HEHHMH&.HHHHHH?H)Hiʚ;HH)HUHB]UHH}HE@]UHH}HE@]UHH}HHEH]UHHH}HEHHEHUHHH}HuHEHtHHHHҐUHHH}HuHEHtHHHHҐUHHH}HuHUHH
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Total ThreadAttributed Total Thread TimeAttr. Total ThreadUnexpected TOTAL metric subtype %dExclusive Sync Wait CountExcl. Sync Wait CountInclusive Sync Wait CountIncl. Sync Wait CountAttributed Sync Wait CountAttr. Sync Wait CountUnexpected LWCNT metric subtype %dExclusive Total CPU TimeExcl. Total CPUInclusive Total CPU TimeIncl. Total CPUAttributed Total CPU TimeAttr. Total CPUUnexpected TOTAL_CPU metric subtype %dExclusive Trap CPU TimeExcl. Trap CPUInclusive Trap CPU TimeIncl. Trap CPUAttributed Trap CPU TimeAttr. Trap CPUUnexpected CP_LMS_TRAP metric subtype %dExclusive Kernel Page Fault TimeExcl. Kernel Page FaultInclusive Kernel Page Fault TimeIncl. Kernel Page FaultAttributed Kernel Page Fault TimeAttr. Kernel Page FaultUnexpected CP_LMS_KFAULT metric subtype %dExclusive Sleep TimeExcl. SleepInclusive Sleep TimeIncl. SleepAttributed Sleep TimeAttr. SleepUnexpected CP_LMS_SLEEP metric subtype %dExclusive Stopped TimeExcl. StoppedInclusive Stopped TimeIncl. StoppedAttributed Stopped TimeAttr. StoppedUnexpected CP_LMS_STOPPED metric subtype %dExclusive Bytes AllocatedExcl. Bytes AllocatedInclusive Bytes AllocatedIncl. Bytes AllocatedAttributed Bytes AllocatedAttr. Bytes AllocatedUnexpected BYTES_MALLOCD metric subtype %dExclusive AllocationsExcl. AllocationsInclusive AllocationsIncl. AllocationsAttributed AllocationsAttr. AllocationsUnexpected MALLOCS metric subtype %dExclusive Bytes LeakedExcl. Bytes LeakedInclusive Bytes LeakedIncl. Bytes LeakedAttributed Bytes LeakedAttr. Bytes LeakedUnexpected BYTES_LEAKED metric subtype %dExclusive LeaksExcl. LeaksInclusive LeaksIncl. LeaksAttributed LeaksAttr. LeaksUnexpected LEAKS metric subtype %dExclusive Read BytesExcl. Read BytesInclusive Read BytesIncl. Read BytesAttributed Read BytesAttr. Read BytesUnexpected READ_BYTES metric subtype %dExclusive Write BytesExcl. Write BytesInclusive Write BytesIncl. Write BytesAttributed Write BytesAttr. Write BytesUnexpected WRITE_BYTES metric subtype %dExclusive Read CountExcl. Read CountInclusive Read CountIncl. Read CountAttributed Read CountAttr. Read CountUnexpected READCNT metric subtype %dExclusive Write CountExcl. Write CountInclusive Write CountIncl. Write CountAttributed Write CountAttr. Write CountUnexpected WRITECNT metric subtype %dExclusive Other I/O CountExcl. Other I/O CountInclusive Other I/O CountIncl. Other I/O CountAttributed Other I/O CountAttr. Other I/O CountUnexpected OTHERIOCNT metric subtype %dExclusive I/O Error CountExcl. I/O Error CountInclusive I/O Error CountIncl. I/O Error CountAttributed I/O Error CountAttr. I/O Error CountUnexpected IOERRORCNT metric subtype %dExclusive Read TimeExcl. Read TimeInclusive Read TimeIncl. Read TimeAttributed Read TimeAttr. Read TimeUnexpected READ_TIME metric subtype %dExclusive Write TimeExcl. Write TimeInclusive Write TimeIncl. Write TimeAttributed Write TimeAttr. Write TimeUnexpected WRITE_TIME metric subtype %dExclusive Other I/O TimeExcl. Other I/O TimeInclusive Other I/O TimeIncl. Other I/O TimeAttributed Other I/O TimeAttr. Other I/O TimeUnexpected OTHERIO_TIME metric subtype %dExclusive I/O Error TimeExcl. I/O Error TimeInclusive I/O Error TimeIncl. I/O Error TimeAttributed I/O Error TimeAttr. I/O Error TimeUnexpected IOERROR_TIME metric subtype %dSizebytesPC AddressPC Addr.NameExclusive Non-OpenMP TimeExcl. Non-OMPInclusive Non-OpenMP TimeIncl. Non-OMPAttributed Non-OpenMP TimeAttr. Non-OMPUnexpected Non-OpenMP metric subtype %dExclusive OpenMP Overhead TimeExcl. OMP ovhd.Inclusive OpenMP Overhead TimeIncl. OMP ovhd.Attributed OpenMP Overhead TimeAttr. OMP ovhd.Unexpected OpenMP Overhead metric subtype %dExclusive OpenMP Work TimeExcl. OMP WorkInclusive OpenMP Work TimeIncl. OMP WorkAttributed OpenMP Work TimeAttr. OMP WorkUnexpected OpenMP Work metric subtype %dExclusive OpenMP Implicit Barrier TimeExcl. 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	printw(/usr/bin/lp -c -n%d %s) 2>/dev/null 1>&2(/usr/bin/lp -c -d%s -n%d %s) 2>/dev/null 1>&2Error: report is too long.
Error: empty temporary file: %s
rError: cannot open temporary file: %s
Error: cannot read temporary file: %s
.class>  ()
       
	Load Object Coverage:
----------------------------------------------------------------
Experiment: %s
No errors
No warnings
%s%-*s%*s%s
Functions sorted by metric: PCs sorted by metric: Lines sorted by metric: Dataobjects sorted by metric: Objects sorted by metric: %s

No dataspace information recorded in experiments

##    Source FileObject FileLoad ObjectMangled NameAliasesScopeTypeMember ofOffset (bytes)Size (bytes)Elements%s
    %s
	%*s: %*s (  0. %%)
 (%5.1f%%)
Count %*s
 %s(Global)
%s(%s)
(Synthetic)
%lld
Error: Specified item `%s' had no recorded metrics.
*name%dSource file: %s
Object file: %s
Load Object: %s

?%*s. %*d. %*c%*c[%*s] %*c[%*d] INTERNAL ERROR: missing line textFunctions sorted by metric: %s

Dataobjects sorted by metric: %s

Objects sorted by metric: %s

Get_Hist_data call failed %d
Functions Call Tree. Metric: +-  |  Callers and callees sorted by metric: =CallersNo Callers%s%s
Stack Fragment
%s%s
CalleesNo CalleesNo leak or allocation information recorded in experiments

e.heapleakbytes:e.heapleakcnt:nameSummary Results: Distinct Leaks = %d, Total Instances = %lld, Total Bytes Leaked = %lld

Leak #%d, Instances = %lld, Bytes Leaked = %lld
  %s
No leak information

e.heapallocbytes:e.heapalloccnt:nameSummary Results: Distinct Allocations = %d, Total Instances = %lld, Total Bytes Allocated = %lld

Allocation #%d, Instances = %lld, Bytes Allocated = %lld
No allocation information

Instances = %d  Bytes Allocated = %lld
Bytes Leaked = %lld

Process With Highest Peak Memory Usage
-------------------------------------------------------
Heap size bytes                   %lld
Experiment Id                     %d
Process Id                        %d
Time of peak                      %.3f (secs.)

Memory Allocations Statistics
Allocation Size Range             Allocations          
  0KB - 1KB                       %d
  1KB - 8KB                       %d
  8KB - 32KB                      %d
  32KB - 128KB                    %d
  128KB - 256KB                   %d
  256KB - 512KB                   %d
  512KB - 1000KB                  %d
  1000KB - 10MB                   %d
  10MB - 100MB                    %d
  100MB - 1GB                     %d
  1GB - 10GB                      %d
  10GB - 100GB                    %d
  100GB - 1TB                     %d
  1TB - 10TB                      %d

Smallest allocation bytes         %lld
Largest allocation bytes          %lld
Total allocations                 %d
Total bytes                       %lld

Memory Leaks Statistics
Leak Size Range                   Leaks              

Smallest leaked bytes             %lld
Largest leaked bytes              %lld
Total leaked                      %d 
There is no heap event information in the experiments
Write Time=%.6f (secs.)  Write Bytes=%lld  Write Count=%d
Read Time=%.6f (secs.)  Read Bytes=%lld  Read Count=%d
Other I/O Time=%.6f (secs.)  Other I/O Count=%d
I/O Error Time=%.6f (secs.)  I/O Error Count=%d

Write Statistics
I/O Size Range                    Write Calls          
  1GB - 10GB                     %d
  10GB - 100GB                   %d
  100GB - 1TB                    %d
  1TB - 10TB                     %d

Longest write                     %.6f (secs.)
Smallest write bytes              %lld
Largest write bytes               %lld
Total time                        %.6f (secs.)
Total calls                       %d

Read Statistics
I/O Size Range                    Read Calls         
------------------------------------------------------

Longest time                      %.6f (secs.)
Smallest read bytes               %lld
Largest read bytes                %lld

Other I/O Statistics
-----------------------------------------------------
Total calls                       %d 

I/O Error Statistics
There is no IO event information in the experiments
<Sum across selected experiments>Individual samples

%*s

Sample Number%*s: %d

%.3lfAggregated statistics for selected samples%*s

Start Label%*s: %s
End LabelStart Time (sec.)%*s: N/A%*.3fEnd Time (sec.)Duration (sec.)Total Thread Time (sec.)%*s: %*.3fAverage number of Threads

Process Times (sec.)%*s:
0.   %*s (  0. %%)%*.3f (%5.1f%%)%*s: %*s
Error: No function or file has been specified.
Error: %s is not a real function; no source or disassembly available.
Error: No source or disassembly available for hidden object %s.
Error: Source file context %s does not contribute to function `%s'.
Error: No function with given name `%s %s' found.
Error: No function or file with given name `%s' found.
Error: Object name not recorded in experiment
Error: Source location not recorded in experiment
Error: %s
<html><title>%s</title>
<center><h3>%s</h3></center>
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<tr>G&nbsp;&nabla;<th class="th_L%s">%s&nbsp;<br>%s&nbsp;%s&nbsp;<br>%s&nbsp;</th><th class="th_C%s">%s&nbsp;<br>%s&nbsp;%s&nbsp;<br>%s&nbsp;</th><th colspan=%d class="th_C%s">%s&nbsp;<br>%s&nbsp;%s&nbsp;<br>%s&nbsp;</th></tr>
<tr>sec.<th class="th_C%s">&nbsp;(%s)</th><th class="th_C%s">&nbsp;</th><th class="th_C%s">(%s)</th><th class="th_C%s">&nbsp;(%%)</th></tr>
<tr><td class="td_R%s"><tt>0.&nbsp;&nbsp;&nbsp;</tt></td><td class="td_R%s"><tt>%4.3lf</tt></td><td class="td_L%s">%s</td><td  class="td_R%s"><tt>%4.3lf</tt></td><td  class="td_R%s"><tt>%d</tt></td><td  class="td_R%s"><tt>%lld</td></tt><td  class="td_R%s"><tt>%llu</td></tt><td  class="td_R%s"><tt>%u:0x%08x</tt></td><td  class="td_R%s"><tt>0.&nbsp;&nbsp;&nbsp;</tt></td><td  class="td_R%s"><tt>%4.3f</tt></td><td class="td_R%s">0.&nbsp;&nbsp;&nbsp;</td><td class="td_R%s">%3.2f</td></table></center></html>
"%s"%c(sec.)"V  %s"%c"   %s"%c"V  "%c"V  (%s)"%c"   "%c"   (%s)"%c%%"0."%c"%4.3lf"%c"%d"%c"%lld"%c"%llu"%c"%u:0x%08x"%c"%4.3f"%c"%3.2f"%c&quot;&amp;&lt;&gt;ITEM Vector<ITEM>::remove(long int) [with ITEM = Histable*]/bb.download/source/binutils-2.41/gprofng/src/vec.hindex >= 0index < counteAY@.Aư>UHH}HEH@]UHH}HE@L]UHH}HE@x]UHH}HE@l]UHH}HE]UHH}HEH]UHH}HEH]UHH}HEǀ]UHHH}HEu$HEHtHEtUHHH}HEHtHEtUHHH}HEt6HEt(HE@uHEHtUHHH}HEt6HEt(HE@uHEHtUHH}HEt7HEt)HE@uHEt]UHH H}EHEH#E9EUHH}HE@(]UHH}HEH@x]UHH}HEH@0]UHHH}HEHHUHSHH}HEHHHEHHtHHHHHEHXHtH HH]UHH}HEHx
]UHHH}HEH@PHUHH}HEH]UHH}HEH]UHH}HEH]UHH}HEH]UHH}HEH]UHH}HEH]UHH}HEH]UHH}HEH]UHH}HEH]UHH}HEH]UHH}HEHh]UHH}HE]UHH}EHEU]UHH}HEH`]UHHH}HEHHUHH H}HuUHEHUHcHHHUHƸ&HHHHEUHH}HEH@(]UHH}HEH@0]UHH}HEH@P]UHH}HE@`]UHH}HEH@8]UHH}HEH@X]UHH}HE@d]UHH}HEH@@]UHH}HE@h]UHH}HEH@H]UHH}HE@l]UHH}HEH]UHH}HEH]UHH}HEH]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HEH]UHH}HEH]UHH}HEH]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE ]UHH}HE$]UHH}HE(]UHH}HE,]UHH}HE0]UHH}HE4]UHH}HE8]UHH}HE<]UHH}HEH@0]UHH}HE@@]UHH}HEH@8]UHH}HE@D]UHH}HEH@P]UHH}HEH@p]UHH}HE@x]UHH}HE@|]UHH}HEH]UHH}HEH]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HEH]UHH}HEH]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HE]UHH}HHEHHEH@HE@,]UHH}HHEH]UHHH}HEHHEPHUHH}HE@]UHH}uHEUP]UHH}HEH]UHHH}HEHHtHEHHUHH}HEH]UHH}HEH]UHH}HEH@0]UHH}HEH@8]UHH}HEH@X]UHH}HEH@@]UHH}HEH]UHHH}HEH H'z+`W9-1P-+&K#DK)J
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}HuH}uH}uH}uH}uH}uH}uH}u	H}}u	Hn}u	H_}u	HP}u	HA}u	H2}u	H#}u	H}	u	H]UHHH}HuHUHEHHUHH H}EUHEHHEH}t
HEHHEUHHH}HE/HUHHH}H}tHEHUHHH}HuH}t#H}tHUHEHHH}tUHH H}HE#HEH@HUHHHHHEHEH@H9E|HEH@UHH}HE]UHH}HE]======= Symbol::dump: %s =========
         value |    img_offset     | flags|local_ind|
NULL  %3d %8lld |0x%016llx |%5d |%8d |%s

===== END of Symbol::dump: %s =========

.compcom.compcom1In the call below, parameter number %d caused a copy-in -- loop(s) insertedIn the call below, parameter number %d caused a copy-out -- loop(s) insertedIn the call below, parameter number %d caused a copy-in and a copy-out -- loops insertedAlignment of variables in common block may cause performance degradationDO statement bounds lead to no executions of the loop.loops.loopview%*s%s%*s%*s%s%*s%*s%*s%s%s:, Source:Loop below is serial, but parallelizable: Loop below is not parallelized: Loop below is parallelized: loop contains procedure callcompiler generated two versions of this loop<Unknown>the variable(s) "%s" cause a data dependency in this looploop was significantly transformed during optimizationloop may or may not hold enough work to be profitably parallelizedloop was marked by user-inserted pragmaloop contains multiple exitsloop contains I/O, or other function calls, that are not MT safeloop contains backward flow of controlloop may have been distributedtwo loops or more may have been fusedtwo or more loops may have been interchangedn_type=%dFMAINMAINgcc2_compiled.__KAI_KCC_cc_PTS_%s%s/%s%s%s@pltno_name__KAI_KPTS___KAI_KCC___KAI_Kcc_.rela.text.rela.plt.rel.text.rel.plt:P/%s_$X.X
======= Stabs::dump: %s =========
  %3d: %5d '%s'
SymLstLocalLst
===== END of Stabs::dump: %s =========

N_UNDFN_ABSN_TEXTN_DATAN_BSSN_COMMN_FNN_EXTN_TYPEN_GSYMN_FNAMEN_FUNN_OUTLN_STSYMN_TSTSYMN_LCSYMN_TLCSYMN_MAINN_ROSYMN_FLSYMN_TFLSYMN_PCN_CMDLINEN_OBJN_OPTN_RSYMN_SLINEN_XLINEN_ILDPADN_SSYMN_ENDMN_SON_MODN_EMODN_READ_MODN_ALIASN_LSYMN_BINCLN_SOLN_PSYMN_EINCLN_ENTRYN_SINCLN_LBRACN_EXCLN_USINGN_ISYMN_ESYMN_PATCHN_CONSTRUCTN_DESTRUCTN_CODETAGN_FUN_CHILDN_RBRACN_BCOMMN_TCOMMN_ECOMMN_XCOMMN_ECOMLN_WITHN_LENGN_CPROFN_BROWSN_FUN_PUREN_FUN_ELEMENTALN_FUN_RECURSIVEN_FUN_AMD64_PARMDUMPN_SYM_OMP_TLSN_SO_ASN_SO_CN_SO_ANSI_CN_SO_CCN_SO_FORTRANN_SO_FORTRAN77N_SO_PASCALN_SO_FORTRAN90N_SO_JAVAN_SO_C99ITEM Vector<ITEM>::remove(long int) [with ITEM = Include::SrcFileInfo*]/bb.download/source/binutils-2.41/gprofng/src/vec.hindex >= 0index < countvoid Vector<ITEM>::insert(long int, ITEM) [with ITEM = target_info_t*]index <= countValue_t StringMap<Value_t>::remove(const char*) [with Value_t = Symbol*]/bb.download/source/binutils-2.41/gprofng/src/StringMap.h0void Vector<ITEM>::insert(long int, ITEM) [with ITEM = StringMap<Symbol*>::Entry*]UHH}HE@8]UH}}t}u]UHH}HE@]UHH}HEH@]UHHH}HuHEH@HHHEHUHPHUHH}HEH]UHH}HEH]UHH}HEHHt
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]testr/proc/cpuinfoprocessorcpu MHzonExperiment is active; command ignored.
Can not determine CPU clock frequency.
System clock profile resolution can not be determined.
Java arguments can not be set if Java profiling is not enabled.
Count data cannot be collected along with any other data.
Count data cannot be collected with any of -F -S -y -l -j -J -x -t .
-I or -N can only be specified with count data.
Note: Heap profiling will only trace native allocations, not Java allocations.
Warning: No function level data requested; only statistics will be collected.

Store directory %s is not accessible: %s
Store directory %s is not writeable: %s
Collection parameters:
    experiment enabled
	target = %s
	user_expt_name = %s
<NULL>	expt_name = %s
	dir_name = %s
	expt_group = %s
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	I/O tracing enabled
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	descendant processes will not be followed
	following descendant processes: <UNKNOWN>
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	pause-resume (delayed initialization) signal %s (%d)
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	pause-resume (delayed initialization) signal %d
	sample signal %s (%d)
	sample signal %d
	data-collection duration, %d-%d secs.
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	data-collection duration, %d secs.
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collect-x-p%du-h,%s%s,%s%s-H-i-scalibrateall%d,%d-Foff-a-j-y,r%d%s-l-S-L-g-d-oCreating experiment directory %s (Process ID: %ld) ...
SP_COLLECTOR_FROM_GUI
Creating experiment directory %s (Process ID: %ld) ...
Warning: Clock profiling timer reset from %.3f millisec. to %.3f millisec. as required by profiling driver

Warning: clock-based memoryspace and dataspace profiling is no longer supported
lolowhihighhUnrecognized clock-profiling interval `%s'
Warning: Clock profiling at %.3f millisec. interval is not supported on this system; minimum %.3f millisec. used
Clock profiling at %.3f millisec. interval is not supported on this system; maximum %.3f millisec. used
Clock profile interval rounded from %.3f to %.3f (system resolution = %.3f) millisec.Unrecognized synchronization tracing threshold `%s'
Unrecognized heap tracing parameter `%s'
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staticUnrecognized count parameter `%s'
time parameter can not be NULL
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Invalid time parameter `%s': start time must be earlier than end time
Specified PID can not be NULL
Invalid process pid `%s'
,%s,%sNo default HW counter set is defined for %s
HW counter set for %s cannot be loaded on this system
internal error formating HW counter set; malloc failed
HW counter set for %s, "%s", format error
Unrecognized sample period `%s'
unlimitednoneUnrecognized size limit `%s'
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Group file %s is not writeable: %s
user interrupt
Can't fstat group file %s
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%s
Can't update group file %s
Timed out: waiting for group file %s
Can't open group file %s: %s
Can't create group file %s: %s
Unable to lock group file %s
#analyzer experiment groupCan't initialize group file %s
Can't set directory `%s': %s
%s%s.erExperiment name `%s' must end in `.er'
/bin/rm -rf %s >/dev/null 2>&1Cannot remove experiment `%s'
.ergExperiment group name `%s'must end in `.erg'
gprofng was built without support for profiling Java applications
Java-profiling parameter is neither "on", nor "off", nor is it a directory: `%s'
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ldobjectsusedldobjectssrcusedsrcUnrecognized archive-mode parameter `%s'
Invalid sample signal %d
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Signal %s (%d) can not be used for both sample and pause-resume (delayed initialization)
Signal %d can not be used for both sample and pause-resume (delayed initialization)
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Unable to create directory `%s'
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name %s is in use and cannot be updated
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Error: Cannot allocate %d bytes

Error: file size is greater than the limit (%d bytes)

Error: Cannot open file %s
Experiment Load CancelledERRORSWARNINGS%s: %s
(unknown)%s [%s]No errors
No warnings
%s%s%s%sdbeSetPathmaps: size of 'from' does not match for size of 'to'
c_stallsK_c_stallsVector<void*>* dbeGetRefMetricTreeValues(int, Vector<char*>*, Vector<char*>*)/bb.download/source/binutils-2.41/gprofng/src/Dbe.cccycleValues->size () == ngroupscyclesinstsYXXX_TOTAL_TIME_PLUS_THREADSSeconds%0.3f %sPROFDATA_TYPE_DURATIONPROFDATA_TYPE_GCDURATION<unknown>Experiment      :Base Group      : Compare Group   : Compare Group %d : %s%s%s%s (plus %d more)  Target        : '%s'<OS version not recorded><CPU architecture not recorded>  Host          : %s (%s, %s)  Start Time    : %s  Duration      : %0.3f SecondsNONEINT32UINT32INT64UINT64STRINGDOUBLEOBJECTDATEBOOLENUMFK_SECTIONGlobal Definitions%s [EXPGRID==%d](%d) -> %s [%s, PID %d]FK_EXPLISTExperimentsEXPIDFRINFO(%d) -> %sLEAF IN  IN , %llu SOME IN DOBJ.class>%sgenericFUNCTIONINSTRUCTIONSOURCELINESOURCEFILEPlease enter the name of the file to which to printNot a real function; no source or disassembly available.Source location not recorded in experimentObject name not recorded in experimentNo source or disassembly available for hidden objectPrint not available-Unable to submit print request to%s: %sUnable to open fileSource FileObject FileLoad Object<Total><Unknown>Source File: %s%d %*c.  %*d. %*c%*c[%*s] ?%*c[%*d] MET_NORMALMET_CALLMET_CALL_AGRMET_DATAMET_INDXMET_IOMET_HEAPCALLERSCALLEESSELFALLINDEXOBJIOACTFILEIOACTVFDIOCALLSTACKHEAPCALLSTACKLINEINSTRLinesFunction, line # in "sourcefile"PCsFunction + offsetName* +offset .elementStart Time (sec.)End Time (sec.)Duration (sec.)Total Thread Time (sec.)Average number of Threads%lld:0x%08llX(Unknown)%lldobjectsMultiple Selection: %s%s%s (%lld %s)PC AddressSizeMangled NameAliasesMemory Object%s (%lld %s)Index ObjectI/O ActivityHeap Activity(Synthetic)(Global)%s(%s)Offset Size  Name
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Data ObjectScopeTypeMember ofOffsetElementsList TimeExclusive Vector<void*>* dbeGetSummary(int, Vector<long long int>*, int, int)strcmp (mvec->fetch (index2)->get_cmd (), mitem->get_cmd ()) == 0defaultInstruction frequency data from experiment %s

e.heapleakbytes:e.heapleakcnt:namee.heapallocbytes:e.heapalloccnt:name%s [%s, PID %d]long int getTLVisibleIdxByStepping(Experiment*, VMode, int, DataView*, int, int, long int, long int, int)move_count >= 0direction == 1 || direction == -1 || direction == 0UnknownunknownLWPIDLWPlwpTHRIDThreadthreadCPUIDCPUcpuProcessexperimentWrite StatisticsRead StatisticsOther I/O StatisticsI/O Error Statistics0KB - 1KB1KB - 8KB8KB - 32KB32KB - 128KB128KB - 256KB256KB - 512KB512KB - 1000KB1000KB - 10MB10MB - 100MB100MB - 1GB1GB - 10GB10GB - 100GB100GB - 1TB1TB - 10TBLongest write%.6f (secs.)Smallest write bytesLargest write bytesTotal timeTotal callsTotal bytesLongest readSmallest read bytesLargest read bytesProcess With Highest Peak Memory UsageMemory Allocations StatisticsMemory Leaks StatisticsHeap size bytesExperiment IdProcess IdTime of peak%.3f (secs.)Smallest allocation bytesLargest allocation bytesTotal allocationsSmallest leaked bytesLargest leaked bytesTotal leakedEVT_COUNTVector<void*>* dbeGetTLData(int, int, int, int, int, int, hrtime_t, hrtime_t, int, bool, Vector<char*>*)tmp_end_bin < numDeltastmp_start_bin < numDeltasFAIRMAXMINCNTSUMAVGVector<long long int>* dbeGetAggregatedValue(int, char*, char*, char*, hrtime_t, hrtime_t, int, char*, char*)prop_ts == -1key_set != NULLidx_cur != -1id != 0SIGUSR1SIGUSR2SIGPROFkill of process %d not supported
kill(%d, %d) failed: %s
%s/%svoid Vector<ITEM>::insert(long int, ITEM) [with ITEM = long unsigned int]/bb.download/source/binutils-2.41/gprofng/src/vec.hindex >= 0index <= countvoid Vector<ITEM>::insert(long int, ITEM) [with ITEM = DefaultMap<long unsigned int, int>::Entry*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = DefaultMap<Function*, int>::Entry*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = DefaultMap<long unsigned int, Vector<int>*>::Entry*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = DefaultMap<long long int, int>::Entry*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = DefaultMap<long long int, long long int>::Entry*]void Vector<ITEM>::insert(long int, ITEM) [with ITEM = DefaultMap<long long int, long int>::Entry*]Value_t DefaultMap<Key_t, Value_t>::remove(Key_t) [with Key_t = long long int; Value_t = long int]/bb.download/source/binutils-2.41/gprofng/src/DefaultMap.h0Value_t DefaultMap<Key_t, Value_t>::remove(Key_t) [with Key_t = long long int; Value_t = int]Value_t DefaultMap<Key_t, Value_t>::remove(Key_t) [with Key_t = long long int; Value_t = long long int]Value_t DefaultMap<Key_t, Value_t>::remove(Key_t) [with Key_t = long unsigned int; Value_t = Vector<int>*]Value_t DefaultMap<Key_t, Value_t>::remove(Key_t) [with Key_t = Function*; Value_t = int]Value_t DefaultMap<Key_t, Value_t>::remove(Key_t) [with Key_t = long unsigned int; Value_t = int]eA.A?.@&.>Y@UHH}H}tHEH]UHHH}HE/HUHHH}H}tHEHUHHH}HuH}t#H}tHUHEHHH}tUHHHHHEHUHEfH*HEfH*^XfH~fHn]UHH}HEH@]UHH}]UHHH}HuHUHEHHt
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AMD Family 11hAMD Family 15h Model 01hAMD Family 15h Model 02hAMD Family 15h Model 03hPentium 4 with HyperThreadingPentium 4Pentium Pro, Pentium IIPentium with MMXPentiumCore MicroarchitectureIntel Arch PerfMonSPARC64 IIISPARC64 VSPARC64 VISPARC64 VI & VIISPARC64 XSPARC64 XIIUltraSPARC T1UltraSPARC T2UltraSPARC T2+SPARC T3SPARC T4SPARC M4SPARC T5SPARC M5SPARC T6SPARC M6SPARC T7SPARC 3e40SPARC M7SPARC 3e50UltraSPARC IV+UltraSPARC IVUltraSPARC IIIiUltraSPARC IIIi & IIIi+UltraSPARC III+UltraSPARC III+ & IVUltraSPARC IIIUltraSPARC I&IIARMusersystemedgepcinvcmaskbranch-instructionsbranch-missesbus-cyclescache-missescache-referencescyclesinstructionsref-cyclesstalled-cycles-backendstalled-cycles-frontendalignment-faultscontext-switchescpu-clockcpu-migrationsemulation-faultsmajor-faultsminor-faultspage-faultstask-clockL1-dcache-load-missesL1-dcache-loadsL1-dcache-store-missesL1-dcache-storesL1-icache-load-missesL1-icache-loadsdTLB-load-missesdTLB-loadsiTLB-load-missesiTLB-loadsunhalted-core-cyclesunhalted-reference-cyclesinstruction-retiredllc-referencellc-missesbranch-instruction-retiredbranch-misses-retiredld_blocks.store_forwardld_blocks.no_srdtlb_load_misses.walk_pendingdtlb_load_misses.walk_activedtlb_load_misses.stlb_hitint_misc.recovery_cyclesint_misc.recovery_cycles_anyint_misc.clear_resteer_cyclesuops_issued.anyuops_issued.stall_cyclesuops_issued.slow_leaarith.divider_activel2_rqsts.demand_data_rd_missl2_rqsts.rfo_missl2_rqsts.code_rd_missl2_rqsts.all_demand_missl2_rqsts.pf_missl2_rqsts.missl2_rqsts.demand_data_rd_hitl2_rqsts.rfo_hitl2_rqsts.code_rd_hitl2_rqsts.pf_hitl2_rqsts.all_demand_data_rdl2_rqsts.all_rfol2_rqsts.all_code_rdl2_rqsts.all_pfl2_rqsts.referenceslongest_lat_cache.referencelongest_lat_cache.misscpu_clk_unhalted.thread_pcpu_clk_unhalted.thread_p_anycpu_clk_unhalted.ring0_transcpu_clk_unhalted.ref_pl1d_pend_miss.pendingl1d_pend_miss.pending_cyclesl1d_pend_miss.fb_fulldtlb_store_misses.walk_activedtlb_store_misses.stlb_hitload_hit_pre.sw_pfept.walk_pendingl1d.replacementtx_mem.abort_conflicttx_mem.abort_capacitytx_exec.misc1tx_exec.misc2tx_exec.misc3tx_exec.misc4tx_exec.misc5rs_events.empty_cyclesrs_events.empty_endidq.mite_uopsidq.mite_cyclesidq.dsb_uopsidq.dsb_cyclesidq.ms_dsb_cyclesidq.all_dsb_cycles_4_uopsidq.all_dsb_cycles_any_uopsidq.ms_mite_uopsidq.all_mite_cycles_4_uopsidq.all_mite_cycles_any_uopsidq.ms_uopsidq.ms_cyclesidq.ms_switchesicache_16b.ifdata_stallicache_64b.iftag_hiticache_64b.iftag_missicache_64b.iftag_stallitlb_misses.walk_completed_4kitlb_misses.walk_completed_1gitlb_misses.walk_completeditlb_misses.walk_pendingitlb_misses.walk_activeitlb_misses.stlb_hitild_stall.lcpidq_uops_not_delivered.coreuops_dispatched_port.port_0uops_dispatched_port.port_1uops_dispatched_port.port_2uops_dispatched_port.port_3uops_dispatched_port.port_4uops_dispatched_port.port_5uops_dispatched_port.port_6uops_dispatched_port.port_7resource_stalls.anyresource_stalls.sbcycle_activity.cycles_l2_misscycle_activity.cycles_l3_misscycle_activity.stalls_totalcycle_activity.stalls_l2_misscycle_activity.stalls_l3_misscycle_activity.cycles_mem_anycycle_activity.stalls_mem_anyexe_activity.1_ports_utilexe_activity.2_ports_utilexe_activity.3_ports_utilexe_activity.4_ports_utilexe_activity.bound_on_storeslsd.uopslsd.cycles_activelsd.cycles_4_uopsitlb.itlb_flushoffcore_requests.demand_rfooffcore_requests.all_data_rdoffcore_requests.all_requestsuops_executed.threaduops_executed.stall_cyclesuops_executed.coreuops_executed.x87tlb_flush.dtlb_threadtlb_flush.stlb_anyinst_retired.any_pother_assists.anyuops_retired.stall_cyclesuops_retired.total_cyclesuops_retired.retire_slotsmachine_clears.countmachine_clears.smcbr_inst_retired.all_branchesbr_inst_retired.conditionalbr_inst_retired.near_callbr_inst_retired.near_returnbr_inst_retired.not_takenbr_inst_retired.near_takenbr_inst_retired.far_branchbr_misp_retired.all_branchesbr_misp_retired.conditionalbr_misp_retired.near_callbr_misp_retired.near_takenhle_retired.starthle_retired.commithle_retired.abortedhle_retired.aborted_memhle_retired.aborted_timerhle_retired.aborted_memtypehle_retired.aborted_eventsrtm_retired.startrtm_retired.commitrtm_retired.abortedrtm_retired.aborted_memrtm_retired.aborted_timerrtm_retired.aborted_memtypertm_retired.aborted_eventsfp_assist.anyhw_interrupts.receivedrob_misc_events.lbr_insertsmem_inst_retired.lock_loadsmem_inst_retired.split_loadsmem_inst_retired.split_storesmem_inst_retired.all_loadsmem_inst_retired.all_storesmem_load_retired.l1_hitmem_load_retired.l2_hitmem_load_retired.l3_hitmem_load_retired.l1_missmem_load_retired.l2_missmem_load_retired.l3_missmem_load_retired.fb_hitmem_load_misc_retired.ucbaclears.anyl2_trans.l2_wbl2_lines_in.alll2_lines_out.silentl2_lines_out.non_silentl2_lines_out.useless_hwpfsq_misc.split_lockmisalign_mem_ref.loadsmisalign_mem_ref.storesdtlb_load_misses.stlb_hit_4kdtlb_load_misses.stlb_hit_2mint_misc.rat_stall_cyclesuops_issued.flags_mergeuops_issued.single_muluops_issued.core_stall_cyclesarith.fpu_div_activel2_rqsts.l2_pf_missl2_rqsts.l2_pf_hitl2_demand_rqsts.wb_hitl1d_pend_miss.occurencesdtlb_store_misses.stlb_hit_4kdtlb_store_misses.stlb_hit_2mload_hit_pre.hw_pfept.walk_cyclestx_mem.abort_capacity_writecpl_cycles.ring0cpl_cycles.ring0_transcpl_cycles.ring123idq.emptyidq.ms_dsb_uopsidq.ms_dsb_occuridq.mite_all_uopsicache.hiticache.missesicache.ifdata_stallitlb_misses.walk_durationitlb_misses.stlb_hit_4kitlb_misses.stlb_hit_2mild_stall.iq_fullbr_inst_exec.all_conditionalbr_inst_exec.all_direct_jmpbr_inst_exec.all_branchesbr_misp_exec.all_conditionalbr_misp_exec.all_branchesuops_executed_port.port_0uops_executed_port.port_1uops_executed_port.port_2uops_executed_port.port_3uops_executed_port.port_4uops_executed_port.port_5uops_executed_port.port_6uops_executed_port.port_7resource_stalls.rsresource_stalls.robpage_walker_loads.dtlb_l1page_walker_loads.itlb_l1page_walker_loads.dtlb_l2page_walker_loads.itlb_l2page_walker_loads.dtlb_l3page_walker_loads.itlb_l3page_walker_loads.dtlb_memorypage_walker_loads.itlb_memoryinst_retired.x87other_assists.avx_to_sseother_assists.sse_to_avxother_assists.any_wb_assistuops_retired.allmachine_clears.cyclesmachine_clears.maskmovbr_inst_retired.near_call_r3fp_arith_inst_retired.scalarfp_arith_inst_retired.doublefp_arith_inst_retired.singlefp_arith_inst_retired.packedhle_retired.aborted_misc1hle_retired.aborted_misc2hle_retired.aborted_misc3hle_retired.aborted_misc4hle_retired.aborted_misc5rtm_retired.aborted_misc1rtm_retired.aborted_misc2rtm_retired.aborted_misc3rtm_retired.aborted_misc4rtm_retired.aborted_misc5fp_assist.x87_outputfp_assist.x87_inputfp_assist.simd_outputfp_assist.simd_inputmem_uops_retired.lock_loadsmem_uops_retired.lock_storesmem_uops_retired.split_loadsmem_uops_retired.split_storesmem_uops_retired.all_loadsmem_uops_retired.all_storesmem_load_uops_retired.l1_hitmem_load_uops_retired.l2_hitmem_load_uops_retired.l3_hitmem_load_uops_retired.l1_missmem_load_uops_retired.l2_missmem_load_uops_retired.l3_missmem_load_uops_retired.hit_lfbl2_trans.demand_data_rdl2_trans.rfol2_trans.code_rdl2_trans.all_pfl2_trans.l1d_wbl2_trans.l2_filll2_trans.all_requestsl2_lines_in.il2_lines_in.sl2_lines_in.el2_lines_out.demand_cleanidq.ms_mite_cyclesinst_retired.prec_distl2_lines_out.demand_dirtyuops_issued.sIngle_mulfp_comp_ops_exe.x87simd_fp_256.packed_singlesimd_fp_256.packed_doublearith.fpu_divl2_rqsts.rfo_hitsl2_store_lock_rqsts.missl2_store_lock_rqsts.hit_ml2_store_lock_rqsts.alll2_l1d_wb_rqsts.missl2_l1d_wb_rqsts.hit_el2_l1d_wb_rqsts.hit_ml2_l1d_wb_rqsts.alll1d_pend_miss.occurrencesidq.ms_dsb_activationsidq.all_dsb_uopsidq.all_dsb_cyclesidq.all_mite_uopsidq.all_mite_cyclesidq.mite_all_cyclesbr_inst_exec.nontaken_condbr_inst_exec.taken_condbr_inst_exec.taken_direct_jmpbr_misp_exec.nontaken_condbr_misp_exec.taken_conddsb2mite_switches.countdsb_fill.exceed_dsb_linesother_assists.avx_storeuops_retired.active_cyclesbr_misp_retired.not_takenbr_misp_retired.takenmem_load_uops_retired.llc_hitl2_lines_out.pf_cleanl2_lines_out.pf_dirtyl2_lines_out.dirty_allld_blocks.data_unknownld_blocks.all_blockinsts_written_to_iq.instsl2_store_lock_rqsts.hit_el2_l1d_wb_rqsts.hit_shw_pre_req.dl1_missl1d.allocated_in_ml1d.evictionl1d.all_m_replacementresource_stalls2.all_fl_emptyresource_stalls2.bob_fullresource_stalls2.ooo_rsrccpl_cycles.ring0_transitionbr_inst_exec.all_condbr_misp_exec.all_condresource_stalls.lbresource_stalls.fcswresource_stalls.mxcsrresource_stalls.otherdsb_fill.other_canceldsb_fill.all_canceluops_dispatched.threaduops_dispatched.stall_cyclesuops_dispatched.coreagu_bypass_cancel.countload_block.overlap_storesb_drain.anymisalign_mem_ref.storestore_blocks.at_retstore_blocks.l1d_blockpartial_address_aliasdtlb_load_misses.anydtlb_load_misses.walk_cyclesdtlb_load_misses.pde_missmem_inst_retired.loadsmem_inst_retired.storesmem_store_retired.dtlb_missuops_issued.fusedfp_comp_ops_exe.mmxfp_comp_ops_exe.sse_fpfp_comp_ops_exe.sse2_integerfp_comp_ops_exe.sse_fp_packedfp_comp_ops_exe.sse_fp_scalarsimd_int_128.packed_mpysimd_int_128.packed_shiftsimd_int_128.packsimd_int_128.unpacksimd_int_128.packed_logicalsimd_int_128.packed_arithsimd_int_128.shuffle_moveload_dispatch.rsload_dispatch.rs_delayedload_dispatch.mobload_dispatch.anyarith.cycles_div_busyarith.mulinst_queue_writesinst_decoded.dec0two_uop_insts_decodedinst_queue_write_cycleslsd_overflowl2_rqsts.ld_hitl2_rqsts.ld_missl2_rqsts.loadsl2_rqsts.rfosl2_rqsts.ifetch_hitl2_rqsts.ifetch_missl2_rqsts.ifetchesl2_rqsts.prefetch_hitl2_rqsts.prefetch_missl2_rqsts.prefetchesl2_data_rqsts.demand.i_statel2_data_rqsts.demand.s_statel2_data_rqsts.demand.e_statel2_data_rqsts.demand.m_statel2_data_rqsts.demand.mesil2_data_rqsts.prefetch.mesil2_data_rqsts.anyl2_write.rfo.i_statel2_write.rfo.s_statel2_write.rfo.m_statel2_write.rfo.hitl2_write.rfo.mesil2_write.lock.i_statel2_write.lock.s_statel2_write.lock.e_statel2_write.lock.m_statel2_write.lock.hitl2_write.lock.mesil1d_wb_l2.i_statel1d_wb_l2.s_statel1d_wb_l2.e_statel1d_wb_l2.m_statel1d_wb_l2.mesil3_lat_cache.missl3_lat_cache.referencedtlb_misses.anydtlb_misses.walk_completeddtlb_misses.walk_cyclesdtlb_misses.stlb_hitdtlb_misses.pde_missload_hit_prel1d_prefetch.requestsl1d_prefetch.missl1d_prefetch.triggersl1d.repll1d.m_repll1d.m_evictl1d.m_snoop_evictcache_lock_cycles.l1d_l2cache_lock_cycles.l1dio_transactionsl1i.hitsl1i.missesl1i.readsl1i.cycles_stalledlarge_itlb.hititlb_misses.anyitlb_misses.walk_cyclesild_stall.mruild_stall.regenild_stall.anybr_inst_exec.condbr_inst_exec.directbr_inst_exec.non_callsbr_inst_exec.return_nearbr_inst_exec.direct_near_callbr_inst_exec.near_callsbr_inst_exec.takenbr_inst_exec.anybr_misp_exec.condbr_misp_exec.directbr_misp_exec.non_callsbr_misp_exec.return_nearbr_misp_exec.direct_near_callbr_misp_exec.near_callsbr_misp_exec.takenbr_misp_exec.anyresource_stalls.loadresource_stalls.rs_fullresource_stalls.storeresource_stalls.rob_fullresource_stalls.fpcwmacro_insts.fusions_decodedbaclear_force_iqitlb_flushoffcore_requests.demand.rfooffcore_requests.any.readoffcore_requests.any.rfooffcore_requests.anyuops_executed.port0uops_executed.port1uops_executed.port2_coreuops_executed.port3_coreuops_executed.port4_coreuops_executed.port5uops_executed.port015uops_executed.port234offcore_requests_sq_fullsnoopq_requests.codesnoopq_requests.datasnoopq_requests.invalidatesnoop_response.hitsnoop_response.hitesnoop_response.hitminst_retired.mmxuops_retired.anyuops_retired.macro_fusedmachine_clears.mem_orderitlb_miss_retiredmem_load_retired.l1d_hitmem_load_retired.llc_missmem_load_retired.hit_lfbmem_load_retired.dtlb_missfp_mmx_trans.to_fpfp_mmx_trans.to_mmxfp_mmx_trans.anymacro_insts.decodeduops_decoded.stall_cyclesuops_decoded.msuops_decoded.esp_foldinguops_decoded.esp_syncrat_stalls.flagsrat_stalls.registersrat_stalls.rob_read_portrat_stalls.scoreboardrat_stalls.anyseg_rename_stallses_reg_renamesuop_unfusionbr_inst_decodedbpu_missed_call_retbaclear.clearbaclear.bad_targetbpu_clears.latethread_activel2_transactions.loadl2_transactions.rfol2_transactions.ifetchl2_transactions.prefetchl2_transactions.l1d_wbl2_transactions.filll2_transactions.wbl2_transactions.anyl2_lines_in.s_statel2_lines_in.e_statel2_lines_in.anyl2_lines_out.prefetch_cleanl2_lines_out.prefetch_dirtyl2_lines_out.anysq_misc.lru_hintssq_full_stall_cyclesfp_assist.allfp_assist.outputfp_assist.inputsimd_int_64.packed_mpysimd_int_64.packed_shiftsimd_int_64.packsimd_int_64.unpacksimd_int_64.packed_logicalsimd_int_64.packed_arithsimd_int_64.shuffle_moveuops_issued.stalled_cyclesmem_uncore_retired.local_draml1d_cache_ld.i_statel1d_cache_ld.s_statel1d_cache_ld.e_statel1d_cache_ld.m_statel1d_cache_ld.mesil1d_cache_st.s_statel1d_cache_st.e_statel1d_cache_st.m_statel1d_cache_lock.hitl1d_cache_lock.s_statel1d_cache_lock.e_statel1d_cache_lock.m_statel1d_all_ref.anyl1d_all_ref.cacheablel1d_cache_lock_fb_hitlsd.cyclesbpu_clears.earlystore_forwards.goodsegment_reg_loads.anyprefetch.prefetcht0prefetch.sw_l2prefetch.prefetchntadata_tlb_misses.dtlb_miss_lddata_tlb_misses.dtlb_miss_stdata_tlb_misses.dtlb_misspage_walks.cyclesx87_comp_ops_exe.any.sx87_comp_ops_exe.any.arfp_assistfp_assist.armul.smul.ardiv.sdiv.arcycles_div_busyl2_adsl2_dbus_busyl2_lines_inl2_m_lines_inl2_lines_outl2_m_lines_outl2_ifetchl2_ldl2_stl2_lockl2_rqstsl2_rqsts.self.demand.i_statel2_rqsts.self.demand.mesil2_reject_busql2_no_reqeist_transthermal_tripcpu_clk_unhalted.core_pcpu_clk_unhalted.buscpu_clk_unhalted.no_otherl1d_cache.ldl1d_cache.stbus_request_outstandingbus_bnr_drvbus_drdy_clocksbus_lock_clocksbus_data_rcvbus_trans_brdbus_trans_rfobus_trans_wbbus_trans_ifetchbus_trans_invalbus_trans_pwrbus_trans_pbus_trans_iobus_trans_defbus_trans_burstbus_trans_membus_trans_anyext_snoopbus_hit_drvbus_hitm_drvbusq_emptysnoop_stall_drvbus_io_waiticache.accessesitlb.missesitlb.flushmacro_insts.cisc_decodedmacro_insts.all_decodedsimd_uops_exec.ssimd_uops_exec.arsimd_sat_uop_exec.ssimd_sat_uop_exec.arsimd_uop_type_exec.mul.ssimd_uop_type_exec.shift.ssimd_uop_type_exec.pack.ssimd_uop_type_exec.unpack.ssimd_uop_type_exec.logical.ssimd_uop_type_exec.mul.arsimd_uop_type_exec.shift.arsimd_uop_type_exec.pack.arsimd_uop_type_exec.unpack.arsimd_uop_type_exec.logical.arbr_inst_retired.anybr_inst_retired.pred_takenbr_inst_retired.mispred_takenbr_inst_retired.mispredbr_inst_retired.takenbr_inst_retired.any1simd_inst_retired.vectorsimd_inst_retired.anyhw_int_rcvsimd_assistsimd_instr_retiredsimd_sat_instr_retiredbogus_brload_blockload_block.staload_block.stdload_block.until_retireload_block.l1dstore_blockstore_block.drain_cyclesstore_block.orderstore_block.snoopmisalign_mem_refsegment_reg_loadssse_pre_execsse_pre_exec.ntasse_pre_exec.l1sse_pre_exec.l2sse_pre_exec.storesdtlb_missesdtlb_misses.miss_lddtlb_misses.l0_miss_lddtlb_misses.miss_stmemory_disambiguationmemory_disambiguation.resetmemory_disambiguation.successpage_walkspage_walks.countfp_comp_ops_exemuldividle_during_divdelayed_bypassdelayed_bypass.fpdelayed_bypass.simddelayed_bypass.loadl2_dbus_busy_rdcpu_clk_unhaltedl1d_cache_ldl1d_cache_stl1d_cache_lockl1d_cache_lock.durationl1d_alll1d_all_refl1d_all.refl1d_all.cache_refl1d_repll1d_m_repll1d_m_evictl1d_pend_missl1d_splitl1d_split.loadsl1d_split.storessse_pre_misssse_pre_miss.ntasse_pre_miss.l1sse_pre_miss.l2l1d_prefetchcmp_snoopl1i_readsl1i_missesitlbitlb.small_missitlb.large_missinst_queueinst_queue.fullcycles_l1i_mem_stalledild_stallbr_inst_execbr_missp_execbr_bac_missp_execbr_cnd_execbr_cnd_missp_execbr_ind_execbr_ind_missp_execbr_ret_execbr_ret_missp_execbr_ret_bac_missp_execbr_call_execbr_call_missp_execbr_ind_call_execbr_tkn_bubble_1br_tkn_bubble_2rs_uops_dispatchedrs_uops_dispatched_portrs_uops_dispatched_port.0rs_uops_dispatched_port.1rs_uops_dispatched_port.2rs_uops_dispatched_port.3rs_uops_dispatched_port.4rs_uops_dispatched_port.5macro_instsespesp.synchesp.additionssimd_uops_execsimd_sat_uop_execsimd_uop_type_execsimd_uop_type_exec.mulsimd_uop_type_exec.shiftsimd_uop_type_exec.packsimd_uop_type_exec.unpacksimd_uop_type_exec.logicalsimd_uop_type_exec.arithmeticinst_retiredinst_retired.loadsinst_retired.storesinst_retired.otherinst_retired.vm_hx87_ops_retiredx87_ops_retired.fxchx87_ops_retired.anyuops_retireduops_retired.ld_ind_bruops_retired.std_stauops_retired.macro_fusionuops_retired.fuseduops_retired.non_fusedmachine_nukesmachine_nukes.smcmachine_nukes.mem_orderbr_inst_retiredbr_inst_retired_mispredcycles_intcycles_int.maskedcycles_int.pending_and_maskedsimd_inst_retiredsimd_comp_inst_retiredmem_load_retiredmem_load_retired.l1d_missmem_load_retired.l2_line_missfp_mmx_transrat_stallsrat_stalls.partial_cyclesrat_stalls.fpswseg_rename_stalls.esseg_rename_stalls.dsseg_rename_stalls.fsseg_rename_stalls.gsseg_rename_stalls.anyseg_reg_renamesseg_reg_renames.esseg_reg_renames.dsseg_reg_renames.fsseg_reg_renames.gsseg_reg_renames.anyresource_stallsresource_stalls.ld_stresource_stalls.br_miss_clearbaclearspref_rqsts_uppref_rqsts_dnPAPI_br_insPAPI_br_mspFR_retired_branches_mispredPAPI_br_tknFR_retired_taken_branchesPAPI_fp_opsFP_dispatched_fpu_opsPAPI_fad_insPAPI_fml_insPAPI_fpu_idlFP_cycles_no_fpu_ops_retiredPAPI_tot_cycBU_cpu_clk_unhaltedPAPI_tot_insPAPI_l1_dcaDC_accessPAPI_l1_dcmDC_missPAPI_l1_ldmDC_refill_from_L2PAPI_l1_stmPAPI_l1_icaIC_fetchPAPI_l1_icmIC_missPAPI_l1_icrPAPI_l2_dchPAPI_l2_dcmDC_refill_from_systemPAPI_l2_dcrPAPI_l2_dcwPAPI_l2_ichIC_refill_from_L2PAPI_l2_icmIC_refill_from_systemPAPI_l2_ldmPAPI_l2_stmPAPI_res_stlFR_dispatch_stallsPAPI_stl_icyFR_nothing_to_dispatchPAPI_hw_intFR_taken_hardware_intrsPAPI_tlb_dmDC_dtlb_L1_miss_L2_missPAPI_tlb_imIC_itlb_L1_miss_L2_missPAPI_l3_dcrL3_read_reqPAPI_l3_icrPAPI_l3_tcrPAPI_l3_stmL3_missPAPI_l3_ldmPAPI_l3_tcmPAPI_fp_insFR_retired_fpu_instrPAPI_vec_insFP_dispatched_fpu_ops_ffLS_seg_reg_loadLS_uarch_resync_self_modifyLS_uarch_resync_snoopLS_buffer_2_fullLS_retired_cflushLS_retired_cpuidDC_misaligned_data_refDC_uarch_late_cancel_accessDC_uarch_early_cancel_accessDC_dispatched_prefetch_instrDC_dcache_accesses_by_locksBU_memory_requestsBU_data_prefetchIC_itlb_L1_miss_L2_hitIC_uarch_resync_snoopIC_instr_fetch_stallIC_return_stack_hitIC_return_stack_overflowFR_retired_uopsFR_retired_far_ctl_transferFR_retired_resyncsFR_retired_near_retsFR_retired_near_rets_mispredFR_intr_masked_cyclesFR_dispatch_stall_fpu_fullFR_dispatch_stall_ls_fullFR_fpu_exceptionFR_num_brkpts_dr0FR_num_brkpts_dr1FR_num_brkpts_dr2FR_num_brkpts_dr3NB_cpu_io_to_mem_ioNB_cache_block_commandsFP_retired_sse_opsFP_retired_move_opsFP_retired_serialize_opsFP_serialize_ops_cyclesDC_copybackDC_dtlb_L1_miss_L2_hitDC_1bit_ecc_error_foundDC_dtlb_L1_hitBU_system_read_responsesBU_octwords_written_to_systemBU_internal_L2_reqBU_fill_req_missed_L2BU_fill_into_L2IC_evictionIC_cache_lines_invalidateIC_itlb_reloadIC_itlb_reload_abortedFR_retired_mmx_sse_fp_instrNB_mem_ctrlr_page_accessNB_mem_ctrlr_turnaroundNB_thermal_statusNB_sized_commandsNB_probe_results_upstream_reqNB_gart_eventsNB_ht_bus0_bandwidthNB_ht_bus1_bandwidthNB_ht_bus2_bandwidthNB_ht_bus3_bandwidthLS_locked_operationLS_smi_receivedLS_ineffective_prefetchLS_global_tlb_flushNB_mem_ctrlr_reqCB_cpu_to_dram_req_to_targetCB_io_to_dram_req_to_targetCB_cpu_req_to_target_0_to_7L3_l2_eviction_l3_fillL3_evictionNB_ECC_errorsNB_probe_resultNB_sized_blocksSee Chapter 10 of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD Opteron Processors,"
AMD publication #26094See section 3.15 of the "BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h Processors,"
AMD publication #31116See Chapter 19 of the "Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide, Part 2"
Order Number: 253669-047US, June 2013See Chapter 19 of the "Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide"See Chapter 19 of the "Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide, Part 2"
Order Number: 253669-045US, January 2013Intel Arch PerfMon v%d on Family %d Model %dFor counter #%d, register %d is out of range
Counter '%s' could not be bound to a register
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reg# could not be determined for `%s'
for `%s', allowable umask bits are: 0x%llx
`%s' attribute `%s' could not be set to 0x%llx
More than %d counters were specified
Pentium Pro with MMX, Pentium IIIntel Arch PerfMon v3 on Family 6 Model 26Intel Arch PerfMon v3 on Family 6 Model 30Intel Arch PerfMon v3 on Family 6 Model 31Intel Arch PerfMon v3 on Family 6 Model 46Intel Arch PerfMon v3 on Family 6 Model 37Intel Arch PerfMon v3 on Family 6 Model 44Intel Arch PerfMon v3 on Family 6 Model 47Intel Arch PerfMon v3 on Family 6 Model 42Intel Arch PerfMon v3 on Family 6 Model 45Intel Arch PerfMon v3 on Family 6 Model 58Intel Arch PerfMon v3 on Family 6 Model 62Intel Arch PerfMon v3 on Family 6 Model 28Intel Arch PerfMon v3 on Family 6 Model 60Intel Arch PerfMon v3 on Family 6 Model 63Intel Arch PerfMon v3 on Family 6 Model 69Intel Arch PerfMon v3 on Family 6 Model 70Intel Arch PerfMon v3 on Family 6 Model 61Intel Arch PerfMon v3 on Family 6 Model 71Intel Arch PerfMon v3 on Family 6 Model 79Intel Arch PerfMon v3 on Family 6 Model 86Intel Arch PerfMon v4 on Family 6 Model 78Intel Arch PerfMon v4 on Family 6 Model 85Intel Arch PerfMon v4 on Family 6 Model 94ld_blocks_partial.address_aliasdtlb_load_misses.miss_causes_a_walkdtlb_load_misses.walk_completed_4kdtlb_load_misses.walk_completed_2m_4mdtlb_load_misses.walk_completed_1gdtlb_load_misses.walk_completeduops_issued.vector_width_mismatchl2_rqsts.all_demand_referencescpu_clk_thread_unhalted.ref_xclkcpu_clk_thread_unhalted.ref_xclk_anycpu_clk_thread_unhalted.one_thread_activel1d_pend_miss.pending_cycles_anydtlb_store_misses.miss_causes_a_walkdtlb_store_misses.walk_completed_4kdtlb_store_misses.walk_completed_2m_4mdtlb_store_misses.walk_completed_1gdtlb_store_misses.walk_completeddtlb_store_misses.walk_pendingtx_mem.abort_hle_store_to_elided_locktx_mem.abort_hle_elision_buffer_not_emptytx_mem.abort_hle_elision_buffer_mismatchtx_mem.abort_hle_elision_buffer_unsupported_alignmenttx_mem.hle_elision_buffer_fulloffcore_requests_outstanding.demand_data_rdoffcore_requests_outstanding.cycles_with_demand_data_rdoffcore_requests_outstanding.demand_data_rd_ge_6offcore_requests_outstanding.demand_code_rdoffcore_requests_outstanding.cycles_with_demand_code_rdoffcore_requests_outstanding.demand_rfooffcore_requests_outstanding.cycles_with_demand_rfooffcore_requests_outstanding.all_data_rdoffcore_requests_outstanding.cycles_with_data_rdoffcore_requests_outstanding.l3_miss_demand_data_rdoffcore_requests_outstanding.cycles_with_l3_miss_demand_data_rdoffcore_requests_outstanding.l3_miss_demand_data_rd_ge_6itlb_misses.miss_causes_a_walkitlb_misses.walk_completed_2m_4midq_uops_not_delivered.cycles_0_uops_deliv.coreidq_uops_not_delivered.cycles_le_1_uop_deliv.coreidq_uops_not_delivered.cycles_le_2_uop_deliv.coreidq_uops_not_delivered.cycles_le_3_uop_deliv.coreidq_uops_not_delivered.cycles_fe_was_okcycle_activity.cycles_l1d_misscycle_activity.stalls_l1d_missexe_activity.exe_bound_0_portsdsb2mite_switches.penalty_cyclesoffcore_requests.demand_data_rdoffcore_requests.demand_code_rdoffcore_requests.l3_miss_demand_data_rduops_executed.cycles_ge_1_uop_execuops_executed.cycles_ge_2_uops_execuops_executed.cycles_ge_3_uops_execuops_executed.cycles_ge_4_uops_execuops_executed.core_cycles_noneuops_executed.core_cycles_ge_1uops_executed.core_cycles_ge_2uops_executed.core_cycles_ge_3uops_executed.core_cycles_ge_4offcore_requests_buffer.sq_fullmachine_clears.memory_orderingfp_arith_inst_retired.scalar_doublefp_arith_inst_retired.scalar_singlefp_arith_inst_retired.128b_packed_doublefp_arith_inst_retired.128b_packed_singlefp_arith_inst_retired.256b_packed_doublefp_arith_inst_retired.256b_packed_singlehle_retired.aborted_unfriendlyrtm_retired.aborted_unfriendlymem_inst_retired.stlb_miss_loadsmem_inst_retired.stlb_miss_storesmem_load_l3_hit_retired.xsnp_missmem_load_l3_hit_retired.xsnp_hitmem_load_l3_hit_retired.xsnp_hitmmem_load_l3_hit_retired.xsnp_nonedtlb_load_misses.walk_durationdtlb_load_misses.pde_cache_missint_misc.recovery_cycles_occurrencesdtlb_store_misses.walk_durationdtlb_store_misses.pde_cache_missmove_elimination.int_eliminatedmove_elimination.simd_eliminatedmove_elimination.int_not_eliminatedmove_elimination.simd_not_eliminatedoffcore_requests_outstanding.demand_data_rd_ge_6 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er_kernelcollect?Invalid HW counter name: %s
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%s%sautolowhighinsts,,cycles,,l3minsts,,cyclesinsts%s (%s)loonhi%s EventsUndefined Eventsload store load-store memoryspace count not-program-related INTERNAL ERRORHW counter not available[/<reg#>][[~<attr>=<val>]...]    -h {auto|lo|on|hi}
    -h <ctr_def>
        <ctr>
           counter name,            Counter name         ~<attr>=<val>
             `%s'
Default set of HW counters:

    -h %s
unitstype raw namealiasdescriptionregs    %s

    %s

Raw HW counters:

name            Instr_all
branchesloadsstoresinternal use of SPR ring
%s
Instr_SPR_ring_ops            %-19s    %s
Branches that are takenblock load/storeInstr_block_ld_statomic instructionsInstr_atomicprefetchesInstr_SW_prefetchInstr_SW_counthit own L1 data cacheDC_hit            %-22s %s
hit own L2DC_miss_L2_hithit own L3DC_miss_L3_hithit neighbor L2  (same scc)DC_miss_nbr_L2_hitDC_miss_nbr_scc_hitDC_miss_nbr_scc_missall - DC_hitDC_missall - DC_hit - DC_miss_L2_hitDC_miss_L2_missDC_miss_L3_misshit cache on different socketDC_miss_remote_scc_hitDC_miss_local_mem_hitDC_miss_remote_mem_hit            DC_miss_commit
            %s
            %s            %s

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 (`%s'; %s%s) (%s%s)%s,%s%s  %d. %s
insts,,ecstallinsts,,+l2drminsts,,cycles,,c_stalls,,dcmc_stallsinsts,,cycles,,l3m,,dtlbmcycles,,insts,,llminsts,,cycles,,l2dm,,l2dtlbminsts,,cycles,,dcstallusr_timecyclesUser CPUsys_timecycles~system=1~user=0System CPUbranch-instructionsBranch-instructionsbranch-missesBranch-missesbus-cyclesBus Cyclescache-missesCache-missescache-referencesCache-referencesCPU CyclesinstructionsInstructions ExecutedTotal Cyclesstalled-cycles-backendStalled Cycles during issue.stalled-cycles-frontendalignment-faultsAlignment Faultscontext-switchesContext Switchescpu-clockCPU Clockcpu-migrationsCPU Migrationsemulation-faultsEmulation Faultsmajor-faultsMajor Page Faultsminor-faultsMinor Page Faultspage-faultsPage Faultstask-clockClock Count SpecificL1-dcache-load-missesL1 D-cache Load MissesL1-dcache-loadsL1 D-cache LoadsL1-dcache-store-missesL1 D-cache Store MissesL1-dcache-storesL1 D-cache Store StoresL1-icache-load-missesL1 Instructions Load MissesL1 Instructions LoadsdTLB-load-missesD-TLB Load MissesdTLB-loadsD-TLB LoadsiTLB-load-missesiTLB-loadsThe Instruction TLB LoadsCU_cpu_clk_unhaltedEX_retired_instr_w_excp_intricrIC_fetchL1 I-cache RefsicmIC_missL1 I-cache Missesl2imIC_refill_from_systemL2 I-cache MissesdcrDC_accessL1 D-cache RefsdcmDC_miss~umask=0x3L1 D-cache Missesl2dmDC_refill_from_systemL2 D-cache MissesdtlbmDC_unified_tlb_miss~umask=0x7L2 DTLB MissesFP_scheduler_emptyFP_bottom_execute_uops_cyclesLS_ldq_stq_fullLS_locked_operationCU_mab_wait_cyclesIC_instr_fetch_stallEX_intr_masked_cyclesDE_nothing_to_dispatchDE_dispatch_stallsDE_dispatch_stall_ldq_fullEX_dispatch_stall_stq_fullcycles0cycles1insts0insts1BU_cpu_clk_unhaltedl2itlbhIC_itlb_L1_miss_L2_hitL2 ITLB Hitsl2itlbmIC_itlb_L1_miss_L2_missL2 ITLB Missesl2irBU_internal_L2_req~umask=0x1L2 I-cache Refsl2dtlbhDC_dtlb_L1_miss_L2_hitL2 DTLB Hitsl2dtlbmDC_dtlb_L1_miss_L2_missl2drBU_internal_L2_req~umask=0x2L2 D-cache RefsfpaddFP AddsfpmulFP MulsfpustallFR_dispatch_stall_fpu_fullFPU Stall CyclesmemstallFR_dispatch_stall_ls_fullMemory Unit Stall CyclesFP_cycles_no_fpu_ops_retiredFP_serialize_ops_cyclesFR_dispatch_stallsFR_intr_masked_cyclesFR_nothing_to_dispatchLS_buffer_2_fullNB_mem_ctrlr_turnaroundcpu_clk_unhalted.corecpu_clk_unhalted.threadinstr_retired.anypage_walks.cyclescycles_div_busyl2_adsl2_dbus_busyl2_no_reqcpu_clk_unhalted.core_pcpu_clk_unhalted.buscpu_clk_unhalted.no_otherbus_drdy_clocksbus_lock_clocksbus_data_rcvbus_hit_drvbus_hitm_drvbusq_emptysnoop_stall_drvbus_io_waitunhalted-core-cyclesinst_retired.any_pPERF_COUNT_HW_CPU_CYCLESinstruction-retiredPERF_COUNT_HW_INSTRUCTIONSllmllc-missesLast-Level Cache MissesPERF_COUNT_HW_CACHE_MISSES.LLbr_mspbranch-misses-retiredBranch MispredictPERF_COUNT_HW_BRANCH_MISSESbr_insbranch-instruction-retiredBranch Instructionsunhalted-reference-cyclesPERF_COUNT_HW_BUS_CYCLEScpu_clk_unhalted.ref_pcpu_clk_unhalted.thread_pl2m_latencyL2 Cache Miss Est. Latencydchmem_load_retired.l1_hitL1 D-cache Hitsmem_load_retired.l1_missl2hmem_load_retired.l2_hitL2 Cache Hitsl2mmem_load_retired.l2_missL2 Cache Missesl2m_stallcycle_activity.stalls_l2_missL2 Cache Miss Stalll3hmem_load_retired.l3_hitL3 Cache Hitsl3mmem_load_retired.l3_missL3 Cache Missesl3m_stallcycle_activity.stalls_l3_missL3 Cache Miss Stalldtlbm_stalldtlb_load_misses.walk_activeDTLB Miss Est Stallfp_scalarFP Scalar uOpsfp_vectorFP Vector uOpsdtlb_load_misses.walk_pendingint_misc.recovery_cyclesint_misc.recovery_cycles_anyint_misc.clear_resteer_cyclesuops_issued.stall_cyclesarith.divider_activecpu_clk_unhalted.ring0_transcpu_clk_unhalted.thread_p_anyl1d_pend_miss.pending_cyclesdtlb_store_misses.walk_activeept.walk_pendingrs_events.empty_cyclesidq.mite_cyclesidq.dsb_cyclesidq.ms_dsb_cyclesidq.all_dsb_cycles_4_uopsidq.all_dsb_cycles_any_uopsidq.all_mite_cycles_4_uopsidq.all_mite_cycles_any_uopsidq.ms_cyclesicache_16b.ifdata_stallicache_64b.iftag_stallitlb_misses.walk_activeitlb_misses.walk_pendingild_stall.lcpuops_dispatched_port.port_0uops_dispatched_port.port_1uops_dispatched_port.port_2uops_dispatched_port.port_3uops_dispatched_port.port_4uops_dispatched_port.port_5uops_dispatched_port.port_6uops_dispatched_port.port_7resource_stalls.anyresource_stalls.sbcycle_activity.cycles_l2_misscycle_activity.cycles_l3_misscycle_activity.stalls_totalcycle_activity.cycles_mem_anycycle_activity.stalls_mem_anyexe_activity.1_ports_utilexe_activity.2_ports_utilexe_activity.3_ports_utilexe_activity.4_ports_utilexe_activity.bound_on_storeslsd.cycles_4_uopslsd.cycles_activeuops_executed.stall_cyclesinst_retired.total_cycles_psuops_retired.stall_cyclesuops_retired.total_cyclesfp_assist.anymem_load_uops_retired.l1_hitmem_load_uops_retired.l1_missmem_load_uops_retired.l2_hitmem_load_uops_retired.l2_missmem_load_uops_retired.l3_hitmem_load_uops_retired.l3_missDTLB Missesuops_issued.core_stall_cyclesarith.fpu_div_activeept.walk_cyclescpl_cycles.ring0cpl_cycles.ring0_transcpl_cycles.ring123idq.emptyitlb_misses.walk_durationuops_executed_port.port_0uops_executed_port.port_1uops_executed_port.port_2uops_executed_port.port_3uops_executed_port.port_4uops_executed_port.port_5uops_executed_port.port_6uops_executed_port.port_7resource_stalls.rsresource_stalls.robmachine_clears.cycles0xd1~umask=0x080xd1~umask=0x10L3 Cache Hit w/o Snoop0xd1~umask=0x20idq.ms_mite_uops_cyclesidq.ms_mite_cyclesicache.ifetch_stallild_stall.iq_fullmem_load_uops_retired.llc_hitlongest_lat_cache.missint_misc.rat_stall_cyclesresource_stalls2.all_fl_emptyresource_stalls2.bob_fullresource_stalls2.ooo_rsrccpl_cycles.ring0_transitionidq.all_dsb_cyclesidq.all_mite_cyclesidq.mite_all_cyclesresource_stalls.lbresource_stalls.lb_sbresource_stalls.mem_rsresource_stalls.fcswresource_stalls.mxcsrresource_stalls.otherresource_stalls.ooo_rsrcuops_dispatched.stall_cyclesuops_retired.active_cyclesmem_load_retired.l1d_hit0xCB~umask=0x1eL1 D-Cache Misseslfbdhmem_load_retired.hit_lfbLFB D-cache Hits0xCB~umask=0x1cl3h_stalll3hsnoopL3 Cache Hit w/Snoopl3hsnoop_stallmem_load_retired.llc_missaddr_alias_stallpartial_address_aliasuope_stallUOP Execute Stalls per Coreuopr_stallUOP Retired Stallsitlbmitlb_miss_retiredITLB Missesl1i_stalll1i.cycles_stalledL1 I-cache Stallsbr_retsbr_inst_retired.all_branchesBranch Instruction Retiresbr_mispbr_misp_exec.anyBranch Mispredictsmach_clearMachine Clear Assertedfp_mmxfp_mmx_trans.anyFP-MMX Transistionsdiv_busyarith.cycles_div_busyDivider Busy Cyclessb_drain.cyclesdtlb_load_misses.walk_cyclesmemory_disambiguation.resetinst_queue_write_cycleshw_int.cycles_maskeddtlb_misses.walk_cyclessfence_cyclescache_lock_cycles.l1dcache_lock_cycles.l1d_l2itlb_misses.walk_cyclesitlb_misses.pmh_busy_cyclesild_stall.mruild_stall.regenild_stall.anyresource_stalls.loadresource_stalls.rs_fullresource_stalls.storeresource_stalls.rob_fullresource_stalls.fpcwoffcore_requests_sq_fullrat_stalls.flagsrat_stalls.registersrat_stalls.rob_read_portrat_stalls.scoreboardrat_stalls.anyseg_rename_stallssq_full_stall_cyclescpu_clk_unhaltedinst_retireduops_stalleduOps Stalledmem_load_retired~umask=0x08L2 Line Missesmem_load_retired~umask=0x10L1 DTLB Missesl1mmem_load_retired~umask=0x02L1 Line Missesrs_fullresource_stalls~umask=0x02Reservation Station Fullbr_miss_flushresource_stalls~umask=0x10Mispredicted Branch Flushesld_st_fullresource_stalls~umask=0x04Load/Store Buffers Fullrob_fullresource_stalls~umask=0x01Reorder Buffer Fullslow_decodeild_stallSlow Instruction Decodebr_missbr_cnd_missp_execMispredicted Branchesret_missbr_call_missp_execMispredicted Return Callsidle_during_divDivider Unit Busyfp_assistsfp_assistFP Microcode Assistsbus_busybus_drdy_clocks~umask=0x60Busy Data Busstore_blockstore_block.drain_cyclesstore_block.orderstore_block.snoopdelayed_bypass.loadl2_dbus_busy_rdl1d_cache_lock.durationinst_queueinst_queue.fullcycles_l1i_mem_stalledrs_uops_dispatchedrs_uops_dispatched_portrs_uops_dispatched_port.0rs_uops_dispatched_port.1rs_uops_dispatched_port.2rs_uops_dispatched_port.3rs_uops_dispatched_port.4rs_uops_dispatched_port.5cycles_intcycles_int.maskedcycles_int.pending_and_maskedrat_stallsrat_stalls.partial_cyclesrat_stalls.fpswseg_rename_stalls.esseg_rename_stalls.dsseg_rename_stalls.fsseg_rename_stalls.gsseg_rename_stalls.anyresource_stallsresource_stalls.ld_stresource_stalls.br_miss_clearinstr_retired~emask=0x3L1 Cache MissesTC_deliver_modemachine_clearifu_ifetch_missI$ Missesdcrmdcu_m_lines_inD$ Read Missesdcwmdcu_m_lines_outD$ Write MissesflopsFloating-point Opsitlb_misseciml2_ifetchE$ Instr. MisseskcyclesKCPU CycleskucyclesKUCPU CycleskthrKTHR Cyclescycle_countsinstruction_countsL1D_missdcstallL1D_wait_allL1 D-cache Stall CyclesL1I_wait_allL2_miss_wait_dm_bank0L2_miss_wait_dm_bank1L2_miss_wait_dm_bank2L2_miss_wait_dm_bank3L2_miss_wait_pf_bank0L2_miss_wait_pf_bank1L2_miss_wait_pf_bank2L2_miss_wait_pf_bank3LL_miss_wait_dm_bank0LL_miss_wait_dm_bank1LL_miss_wait_dm_bank2LL_miss_wait_dm_bank3LL_miss_wait_pf_bank0LL_miss_wait_pf_bank1LL_miss_wait_pf_bank2LL_miss_wait_pf_bank3branch_comp_waitcse_priority_waitd_move_waiteu_comp_waitfl_comp_waitl2_sy_miss_wait_dm_part1l2_sy_miss_wait_dm_part2msgr_reqp_waitmsgr_rtnp_waitmsgs_waitop_stv_waitop_stv_wait_exop_stv_wait_l1d_missop_stv_wait_l1d_miss_exop_stv_wait_l2_missop_stv_wait_l2_miss_exop_stv_wait_ll_missop_stv_wait_ll_miss_exop_stv_wait_nc_pendop_stv_wait_pfp_busyop_stv_wait_pfp_busy_exop_stv_wait_pfp_busy_swpfop_stv_wait_swpfop_stv_wait_sxmissop_stv_wait_sxmiss_exw_branch_comp_waitw_eu_comp_waitw_fl_comp_waitw_op_stv_waitw_op_stv_wait_exw_op_stv_wait_l1d_missw_op_stv_wait_l1d_miss_exw_op_stv_wait_l2_missw_op_stv_wait_l2_miss_exw_op_stv_wait_ll_missw_op_stv_wait_ll_miss_exw_op_stv_wait_nc_pendw_op_stv_wait_pfp_busyw_op_stv_wait_pfp_busy_exw_op_stv_wait_pfp_busy_swpfw_op_stv_wait_sxmissw_op_stv_wait_sxmiss_exsingle_mode_cycle_countssuspend_cyclesleep_cycleop_r_iu_req_mi_goop_wait_allwrite_op_uTLBsx_miss_count_dml2wmdvp_count_dmL2 Cache Writeback Missesl2refsx_read_count_dmL2 Cache Refsl2stallsx_miss_wait_dmL2 Cache Stall Cyclesif_r_iu_req_mi_goicstallif_wait_allL1 I-cache Stall Cycleswrite_if_uTLBfloating_instructionsload_store_instructionsactive_cycle_countsx_miss_wait_pfsx_miss_count_dm_ifswpf_lbs_hittrap_DMMU_misssx_miss_count_dm_opexsx_miss_count_dm_opshCycles_userCycles_user~system=1~user=0Instr_allCommit_0_cycStall CyclesSel_0_wait_cycSel_0_cyc~emask=0x3fSelect Stall CyclesInstr_ldLoad InstructionsInstr_stStore InstructionsDC_miss_commitlmh_specLocal Mem Speculative Hitsrmh_specRemote Mem Speculative HitsDTLB_HWTWdtlb_hwtw_stallsDTLB HWTW Est Stallsdtlb_trap_stallsDTLB_HWTW_miss_trapDTLB Trap Est StallsrawhazRAW_hitRead-after-write Hazardsbr_msp_stallsBr_mispredBranch Mispredict Stallsbr_tknBr_takenBranch TakenBranchesfguInstr_FGU_cryptoFP/VIS/Crypto Instructionsspill_fillFlush_spill_fillFetch_stall_IFU_reset_cycFetch_stall_IC_miss_cycFetch_stall_ITLB_miss_cycFetch_stall_SEL_buf_full_cycFetch_ready_cycFetch_0_cycFetch_0_all_cycFetch_1_cycFetch_2_cycFetch_3_cycFetch_4_cycFetch_5_cycFetch_6_cycFetch_7_cycFetch_8_cycFetch_cycITLB_HWTW_hit_8KITLB_HWTW_hit_64KITLB_HWTW_hit_4MITLB_HWTW_hit_256MITLB_HWTW_hit_16GITLB_HWTW_hit_1TITLB_HWTW_miss_trapITLB_HWTWBr_BTC_missSel_0_no_instr_cycSel_0_pipe_drain_cycSel_0_postsync_cycSel_0_presync_cycSel_0_thread_hog_cycSel_0_tag_stall_cycSel_0_ready_cycSel_0_cycITLB_HWTW_L2_hitITLB_HWTW_L3_hitITLB_HWTW_L3_missDTLB_HWTW_L2_hitDTLB_HWTW_L3_hitDTLB_HWTW_L3_missDTLB_HWTW_refLoad instructions completedStore instructions completedInstr_otherTotal instructions completedRename_tag_wait_PQ_1_EXU_cycRename_tag_wait_PQ_0_LSU_cycRename_wait_crypto_diag_cycSel_0_wait_ROB_cycSel_0_wait_WRF_cycSel_0_wait_LB_cycSel_0_wait_SB_cycFetch_stall_misc_cycFetch_stall_cycMMU_TTE_buffer_tag_wait_cycMMU_PRQ_pool_tag_wait_cycL2I_request_block_cycL2I_thread_hog_stall_cycL2I_MB_full_cycL2I_snoop_evictionFlush_thread_hogFlush_evil_twinFlush_LSU_trapFlush_mode_changeFlush_misalignFlush_allFlush_spill_n_normalFlush_spill_n_otherFlush_fill_n_normalFlush_fill_n_otherFlush_lost_loadBr_dir_mispredLSU_st_q_tag_wait_cycLSU_st_q_tag_wait_all_cycDC_sec_miss_L2_hit_commitDC_miss_L2_hit_commitDC_miss_L3_hit_commitDC_miss_nbr_L3_hit_commitDC_miss_remote_L3_hit_commitDC_miss_local_mem_hit_commitDC_miss_remote_mem_hit_commitLoads that missed local L1DStore_L2_hitStore_L3_hitStore_nbr_L2_hitStore_nbr_L3_hitStore_remote_L3_hitStore_local_mem_hitStore_remote_mem_hitStore_allRAW_hit_st_bufRAW_hit_st_qCycles_user_non_MLACycles_user_MLADTLB_HWTW_hit_8KDTLB_HWTW_hit_64KDTLB_HWTW_hit_4MDTLB_HWTW_hit_256MDTLB_HWTW_hit_16GDTLB_HWTW_hit_1TCommit_0_all_cycIC_miss_commitL1 I-Cache Missesraw_stbRAW Hazard in Store Bufferraw_stqRAW Hazard in Store QueuepqsPQ_tag_wait_cycPick Queue Stallssel_stallsl3m_specL3 D-cache Speculative MissesDTLB_HWTW_searchRAW_hit_st_q~emask=0xfSel_pipe_drain_cycSel_1_cycSel_2_cycPick_0_cycPick_1_cycPick_2_cycPick_3_cycPick_any_cycITLB_HWTW_hit_2G_16GITLB_HWTW_searchInstr_buffer_full_cycROB_tag_wait_cycLB_tag_wait_cycSB_tag_wait_cycROB_LB_tag_wait_cycROB_SB_tag_wait_cycLB_SB_tag_wait_cycROB_LB_SB_tag_wait_cycDTLB_miss_tag_wait_cycDC_miss_L2_L3_hit_commitDC_miss_nbr_scc_hit_commitDC_miss_nbr_scc_miss_commitDTLB_HWTW_hit_2G_16GSt_q_tag_wait_cycSt_L2_hitSt_L3_hitCommit_1_cycCommit_2_cycCommit_1_or_2_cycl2l3dhDC_miss_L2_L3_hit_nospecL2 or L3 D-cache HitsL3 D-cache MisseslmhDC_miss_local_hit_nospecLocal Mem. HitsrmhDC_miss_remote_L3_hit_nospecRemote Mem. HitsPQ_tag_waitSel_0_readyicm_stallsL1 I-Cache Miss Est StallsCommit_0DC_miss_nospecDC_miss_local_hit~emask=0x30DC_miss_local_hitDTLB_miss_asynchDTLB_HWTW_allDTLB_fill_trapSel_pipe_drain_cyclesSel_0_waitSel_1Sel_2Pick_0Pick_1Pick_2Pick_3Pick_anyBTC_missITLB_fill_8KBITLB_fill_64KBITLB_fill_4MBITLB_fill_256MBITLB_fill_2GBITLB_fill_trapITLB_miss_asynchFetch_0Fetch_0_allInstr_buffer_fullROB_tag_waitLB_tag_waitROB_LB_tag_waitSB_tag_waitROB_SB_tag_waitLB_SB_tag_waitROB_LB_SB_tag_waitDTLB_miss_tag_waitDTLB_fill_8KBDTLB_fill_64KBDTLB_fill_4MBDTLB_fill_256MBDTLB_fill_2GBSt_q_tag_waitSt_hit_L2St_hit_L3DC_miss_L2_L3_hitL2_pipe_stallCommit_0_allCommit_1Commit_2Commit_1_or_2DC_miss_local_hit~emask=0x6Instr_cntDTLB_missl2drmL2_dmiss_ldITLB_missL2_imissDES_3DES_busy_cycleAES_busy_cycleKasumi_busy_cycleMD5_SHA-1_SHA-256_busy_cycleMA_busy_cycleCycle_cntIC_fillDC_rd_missDC_wr_missDC_rdD$ Read RefsdcwDC_wrD$ Write RefsL2_refL2$ RefsL2_missL2$ Missesl2rmL2_rd_missL2$ Read MissesL2_IC_missL2$ Instr. MissesecmL3_missE$ MissesecrmL3_rd_missE$ Read MissesecmlSSM_L3_miss_localE$ Local MissesecmrSSM_L3_miss_remoteE$ Remote MissesL3_IC_missDispatch0_IC_missI$ Stall CyclesRe_DC_missD$ and E$ Stall CyclesecstallRe_L3_missE$ Stall CyclessqstallRstall_storeQStoreQ Stall CyclesrawstallRe_RAW_missRAW Stall CyclesdcmissovRe_DC_missovhdDC Miss OvhdRe_FPU_bypassfpusestallRstall_FP_useFPU Use Stall CyclesiustallRstall_IU_useIU Stall CyclesFA_pipe_completionFM_pipe_completionDispatch0_2nd_brDispatch0_otherL2L3_snoop_cb_shL2L3_snoop_inv_shL2_hit_I_state_shL2_hit_other_halfL2_snoop_cb_shL2_snoop_inv_shL2_wbL2_wb_shL2_write_hit_RTOL2_write_missL3_hit_I_state_shL3_hit_other_halfL3_wbL3_wb_shL3_write_hit_RTOL3_write_miss_RTOMC_reads_0_shMC_reads_1_shMC_reads_2_shMC_reads_3_shMC_stalls_0_shMC_stalls_1_shMC_stalls_2_shMC_stalls_3_shMC_writes_0_shMC_writes_1_shMC_writes_2_shMC_writes_3_shPC_hard_hitPC_invPC_missPC_rdPC_soft_hitRe_L2_missRe_PFQ_fullSI_RTO_src_dataSI_RTS_src_dataSI_ciq_flow_shSI_owned_shSI_snoop_shSSM_L3_miss_mtag_remoteSSM_L3_wb_remoteSSM_new_transaction_shecrefEC_refE$ RefsEC_missesEC_rd_missEC_miss_localEC_miss_remoteEC_ic_missRe_EC_missEC_miss_mtag_remoteEC_snoop_invEC_wbEC_wb_remotePC_port0_rdEC_snoop_cbWC_snoop_cbWC_scrubbedWC_wb_wo_readPC_MS_missesPC_port1_rdPC_snoop_invSW_count_0SW_count_1Dispatch0_mispredDispatch0_br_targetDispatch_rs_mispredEC_write_hit_RTORe_endian_missRe_PC_missSI_snoopSI_ciq_flowSI_ownedMC_msl_busy_stallMC_mdb_overflow_stallMC_page_close_stallMC_reads_0MC_reads_1MC_reads_2MC_reads_3MC_writes_0MC_writes_1MC_writes_2MC_writes_3MC_stalls_0MC_stalls_1MC_stalls_2MC_stalls_3PAPI_l1_dcmPAPI_l1_icmPAPI_l2_dcmPAPI_l2_icmPAPI_l3_dcmPAPI_l3_icmPAPI_l1_tcmPAPI_l2_tcmPAPI_l3_tcmPAPI_ca_snpPAPI_ca_shrPAPI_ca_clnPAPI_ca_invPAPI_ca_itvPAPI_l3_ldmPAPI_l3_stmPAPI_bru_idlPAPI_fxu_idlPAPI_fpu_idlPAPI_lsu_idlPAPI_tlb_dmPAPI_tlb_imPAPI_tlb_tlPAPI_tlb_tmPAPI_l1_ldmPAPI_l1_stmPAPI_l2_ldmPAPI_l2_stmPAPI_btac_mPAPI_prf_dmPAPI_l3_dchPAPI_tlb_sdPAPI_csr_falPAPI_csr_sucPAPI_csr_totPAPI_mem_scyPAPI_mem_rcyPAPI_mem_wcyPAPI_stl_icyPAPI_ful_icyPAPI_stl_ccyPAPI_ful_ccyPAPI_hw_intPAPI_br_ucnPAPI_br_cnPAPI_br_tknPAPI_br_ntkPAPI_br_mspPAPI_br_prcPAPI_fma_insPAPI_tot_iisPAPI_tot_insPAPI_int_insPAPI_fp_insPAPI_ld_insPAPI_sr_insPAPI_br_insPAPI_vec_insPAPI_res_stlPAPI_fp_stalPAPI_tot_cycPAPI_lst_insPAPI_syc_insPAPI_l1_dchPAPI_l2_dchPAPI_l1_dcaPAPI_l2_dcaPAPI_l3_dcaPAPI_l1_dcrPAPI_l2_dcrPAPI_l3_dcrPAPI_l1_dcwPAPI_l2_dcwPAPI_l3_dcwPAPI_l1_ichPAPI_l2_ichPAPI_l3_ichPAPI_l1_icaPAPI_l2_icaPAPI_l3_icaPAPI_l1_icrPAPI_l2_icrPAPI_l3_icrPAPI_l1_icwPAPI_l2_icwPAPI_l3_icwPAPI_l1_tchPAPI_l2_tchPAPI_l3_tchPAPI_l1_tcaPAPI_l2_tcaPAPI_l3_tcaPAPI_l1_tcrPAPI_l2_tcrPAPI_l3_tcrPAPI_l1_tcwPAPI_l2_tcwPAPI_l3_tcwPAPI_fml_insPAPI_fad_insPAPI_fdv_insPAPI_fsq_insPAPI_fnv_insPAPI_fp_opsNo HW counters were specified.HW counter profiling is not supported on this system: %s%sHW counter profiling is not supported on this system
HW counter profiling is not supported on '%s'
Run "%s -h" with no other arguments for more information on HW counters on this system.
`+' may not be correctly supported on `%s' because processor is not recognized.Warning: `-' is not supported on `%s' -- memory reference backtracking will remain enabled for this counter
Warning: `+' is not supported on `%s' -- memory reference backtracking will not be enabled for `%s'
Warning: `+' is not supported on `%s' -- memory reference backtracking will not be enabled for this counter
Warning: HW counter `%s' is not program-related -- callstacks will be not be recorded for this counter
For counter `%s', %s is not a valid register; valid registers: %s
Invalid attribute specified for counter `%s': %s
Duplicate attribute specified for counter `%s': %s
Invalid interval for HW counter `%s': %s
No HW counters were specified.
The HW counter configuration could not be loaded: More than %d counters were specified
The number of HW counters specified exceeds internal resources
mem_inst_retired.latency_above_thresholdUltraSPARC I and II cannot provide overflow interrupts
libcpc cannot identify processor type
Analyzer CPU table is invalid

Specifying HW counters on `%s' (cpuver=%d):

	turn on default set of HW counters at the specified rate
	specify HW counter profiling for one HW counter only
    -h <ctr_def> [-h <ctr_def>]...
    -h <ctr_def>[,<ctr_def>]...
	specify HW counter profiling for up to %u HW counters

Specifying HW counters on `%s' (cpuver=%d)

           Hardware counter profiling is supported for only one counter.
           Hardware counter profiling is supported for up to %u HW counters.
    <ctr_def> == <ctr>%s%s,[<rate>]
must be selected from the available counters
           listed below.  On most systems, if a counter is not listed
           below, it may still be specified by its numeric value.
           Counters labeled as 'memoryspace' in the list below will
           collect memoryspace data by default.
           optional attribute where <val> can be in decimal or hex
           format, and <attr> can be one of: 
           Multiple attributes may be specified, and each must be preceded by a ~.

           Optional attribute where <val> can be in decimal or hex
           format, and <attr> can be one of: 
           Other attributes may be supported by the chip, but are not supported by DTrace and will be ignored by er_kernel.

           Multiple attributes may be specified.

        /<reg#>
           forces use of a specific hardware register.  (Solaris only)
           If not specified, %s will attempt to place the counter into the first
           available register and as a result may be unable to place
           subsequent counters due to register conflicts.
           The / in front of the register number is required if a register is specified.

        <rate> == {auto|lo|on|hi}
           `auto'   (default) match the rate used by clock profiling.
                    If clock profiling is disabled, use `on'.
           `lo'     per-thread maximum rate of ~10 samples/second
           `on'     per-thread maximum rate of ~100 samples/second
           `hi'     per-thread maximum rate of ~1000 samples/second

        <rate> == <interval>
           Fixed event interval value to trigger a sample.
           Smaller intervals imply more frequent samples.
           Example: when counting cycles on a 2 GHz processor,
           an interval of 2,000,003 implies ~1000 samples/sec

           Use this feature with caution, because:
             (1) Frequent sampling increases overhead and may disturb 
                 other applications on your system.
             (2) Event counts vary dramatically depending on the event 
                 and depending on the application.
             (3) A fixed event interval disables any other gprofng
                 internal mechanisms that may limit event rates.

           Guidelines:  Aim at <1000 events per second.  Start by 
           collecting with the 'hi' option; in the experiment overview,
           notice how many events are recorded per second; divide by
           1000, and use that as your starting point.

        A comma ',' followed immediately by white space may be omitted.

    No default HW counter set defined for this system.
    The default HW counter set (%s) defined for %s cannot be loaded on this system.

Aliases for most useful HW counters:

    While the above aliases represent the most useful hardware counters
    for this processor, a full list of raw (unaliased) counter names appears
    below.  First is an overview of some of these names.

        == Cycles.
        Count active cycles with
            Cycles_user
        Set attributes to choose user, system, and/or hyperprivileged cycles.

        == Instructions.
        Count instructions when they are committed with:
        It is the total of these counters:
            Branches               %s
Floating Point and Graphics Unit            Instr_FGU_crypto       %s
            Instr_ld               %s
            Instr_st               %s
basic arithmetic and logical instructions            Instr_other            %s
        Some subsets of these instructions can be counted separately:
            Br_taken               %s
SW Count instructions (counts special no-op assembler instructions)        == Commit.
        Instructions may be launched speculatively, executed out of order, etc.
        We can count the number of cycles during which 0, 1, or 2 instructions are
        actually completed and their results committed:
            %s
            %s
            %s
            %s
        %s is a useful way of identifying parts of your application with
        high-latency instructions.

        == Cache/memory hierarchy.
        In the cache hierarchy:
         * Each socket has memory and multiple SPARC core clusters (scc).
         * Each scc has an L3 cache and multiple L2 and L1 caches.
        Loads can be counted by where they hit on socket:
hit neighbor scc (same socket)miss all caches  (same socket)        These loads can also be grouped:
DC_miss_nbr_scc_hit + DC_miss_nbr_scc_miss        Loads that miss all caches on this socket can be counted:
hit local memory (same socket)hit remote memory (off socket)        These events are for speculative loads, launched in anticipation
        of helping performance but whose results might not be committed.
        To count only data-cache misses that commit, or for memoryspace profiling,
        use the 'memoryspace' counter:
        == TLB misses.
        The Translation Lookaside Buffer (TLB) is a cache of virtual-to-physical
        page translations.  If a virtual address (VA) is not represented in the
        TLB, an expensive hardware table walk (HWTW) must be conducted.  If the
        page is still not found, a trap results.  There is a data TLB (DTLB) and
        an instruction TLB (ITLB).

        TLB misses can be counted by:
DTLB_HWTW_search            ITLB_HWTW_search        or broken down by page size:
DTLB_HWTW_hit_8K            ITLB_HWTW_hit_8K
            DTLB_HWTW_hit_64K           ITLB_HWTW_hit_64K
            DTLB_HWTW_hit_4M            ITLB_HWTW_hit_4M
DTLB_HWTW_hit_256M          ITLB_HWTW_hit_256M
            DTLB_HWTW_hit_2G_16G        ITLB_HWTW_hit_2G_16G
            DTLB_HWTW_miss_trap         ITLB_HWTW_miss_trap        == Branch misprediction.
        Count branch mispredictions with:
            Br_mispred
        It is the total of:
            Br_dir_mispred         direction was mispredicted
            %s         target    was mispredicted

        == RAW hazards.
        A read-after-write (RAW) delay occurs when we attempt to read a datum
        before an earlier write has had time to complete:
            RAW_hit_st_q~emask=0xf
        The mask 0xf counts the total of all types such as:
            RAW_hit_st_buf         write is still in store buffer
            RAW_hit_st_q           write is still in store queue

        == Flush.
        One can count the number of times the pipeline must be flushed:
load missed L3 and >1 strand is active on the coreSPARC exceptions and trap entry/returnstate change to/from halted/paused        Some subsets of instructions can be counted separately:
        We can count the number of cycles during which no instructions were
        able to commit results using:
            %s
        %s is a useful way of identifying parts of your application with
        high-latency instructions.

        In the cache hierarchy:
         * Each processor has 4 memory controllers and 2 quad core clusters (QCC).
         * Each QCC contains 4 cache processor clusters (CPC).
         * Each CPC contains 4 cores.
         * Each core supports 8 hardware threads.
         * The L3 consists of 2 partitions with 1 QCC per partition.
hit own L3 but require copyback from L2DDTLB_HWTW                   ITLB_HWTWDTLB_fill_8KB               ITLB_fill_8KB
            DTLB_fill_64KB              ITLB_fill_64KB
            DTLB_fill_4MB               ITLB_fill_4MB
DTLB_HWTW_hit_256M          ITLB_HWTW_hit_256M
            DTLB_HWTW_hit_16G           ITLB_HWTW_hit_16G
            DTLB_HWTW_hit_1T            ITLB_HWTW_hit_1T        TLB traps, which can require hundreds of cycles, can be counted with:
DTLB_fill_trap              ITLB_fill_trap        RAW_hit events can be broken down into:
        Total data-cache misses can be counted with:
            DC_miss                DC_miss_nospec
        They are the totals of misses that hit in L2/L3 cache, local memory, or
        remote memory:
            DC_miss_L2_L3_hit      DC_miss_L2_L3_hit_nospec
            DC_miss_local_hit      DC_miss_local_hit_nospec
            DC_miss_remote_L3_hit  DC_miss_remote_L3_hit_nospec
        The events in the left column include speculative operations.  Use the
        right-hand _nospec events to count only data accesses that commit
        or for memoryspace profiling.

DTLB_miss_asynch            ITLB_miss_asynchDTLB_fill_256MB             ITLB_fill_256MB
            DTLB_fill_2GB               ITLB_fill_2GB
            DTLB_fill_trap              ITLB_fill_trapOnly one HW counter is allowed per register.  The following counters use register %d: 
HW counter profiling is disabled unless only one logical CPU per HyperThreaded processor is online (see psradm)
The HW counter configuration could not be loaded: %s%sThe HW counter configuration could not be loaded
mem_trans_retired.load_latencymem_trans_retired.precise_storeinsts,,cycles,,+l2m_latency,,dtlbm_stallinsts,,cycles,,l3m_stall,,dtlbm_stallinsts,,cycles,,+l2m_latency,,dtlbminsts,,cycles,,l2m_stall,,dtlbm_stalluser_time,,system_time,,cycles,,insts,,llmStalled Cycles during retirement.The Instruction TLB Load MissesEX_intr_masked_while_pending_cyclesDE_dispatch_stall_serializationDE_dispatch_stall_instr_retire_q_fullDE_dispatch_stall_int_scheduler_q_fullDE_dispatch_stall_fp_scheduler_q_fullDE_dispatch_stall_waiting_all_quietFR_retired_x86_instr_w_excp_intrBU_fill_req_missed_L2~umask=0x1BU_fill_req_missed_L2~umask=0x2FP_dispatched_fpu_ops~umask=0x1FP_dispatched_fpu_ops~umask=0x2FR_dispatch_stall_branch_abort_to_retireFR_dispatch_stall_far_ctl_trsfr_resync_branch_pendFR_dispatch_stall_reorder_buffer_fullFR_dispatch_stall_resv_stations_fullFR_dispatch_stall_segment_loadFR_dispatch_stall_serializationFR_dispatch_stall_waiting_all_quietFR_intr_masked_while_pending_cyclesNB_mem_ctrlr_dram_cmd_slots_missedcycles_int_masked.cycles_int_maskedcycles_int_masked.cycles_int_pending_and_maskedPERF_COUNT_HW_CACHE_MISSES.L1DPERF_COUNT_HW_BRANCH_INSTRUCTIONSunhalted-reference-cycles~system=1~user=0cpu_clk_unhalted.ref_p~system=1~user=0Estimated time stalled on DTLB misses requiring a tablewalk.  Does not include time related to STLB hits.fp_arith_inst_retired.scalar_double~umask=0x3Floating-point scalar micro-ops that retiredfp_arith_inst_retired.128b_packed_double~umask=0x3cFloating-point vector micro-ops that retiredl1d_pend_miss.pending_cycles_anydtlb_store_misses.walk_pendingoffcore_requests_outstanding.cycles_with_demand_data_rdoffcore_requests_outstanding.demand_data_rd_ge_6offcore_requests_outstanding.cycles_with_demand_code_rdoffcore_requests_outstanding.cycles_with_demand_rfooffcore_requests_outstanding.cycles_with_data_rdoffcore_requests_outstanding.cycles_with_l3_miss_demand_data_rdoffcore_requests_outstanding.l3_miss_demand_data_rd_ge_6lock_cycles.cache_lock_durationidq_uops_not_delivered.cycles_0_uops_deliv.coreidq_uops_not_delivered.cycles_le_1_uop_deliv.coreidq_uops_not_delivered.cycles_le_2_uop_deliv.coreidq_uops_not_delivered.cycles_le_3_uop_deliv.coreidq_uops_not_delivered.cycles_fe_was_okcycle_activity.cycles_l1d_misscycle_activity.stalls_l1d_missexe_activity.exe_bound_0_portsdsb2mite_switches.penalty_cyclesuops_executed.cycles_ge_1_uop_execuops_executed.cycles_ge_2_uops_execuops_executed.cycles_ge_3_uops_execuops_executed.cycles_ge_4_uops_execuops_executed.core_cycles_ge_1uops_executed.core_cycles_ge_2uops_executed.core_cycles_ge_3uops_executed.core_cycles_ge_4uops_executed.core_cycles_nonedtlb_load_misses.walk_completeddtlb_load_misses.walk_durationcpu_clk_thread_unhalted.one_thread_activedtlb_store_misses.walk_durationoffcore_requests_outstanding.demand_code_rd_cyclesoffcore_requests_outstanding.demand_rfo_cycleslock_cycles.split_lock_uc_lock_durationuops_executed_port.port_0_coreuops_executed_port.port_1_coreuops_executed_port.port_2_coreuops_executed_port.port_3_coreuops_executed_port.port_4_coreuops_executed_port.port_5_coreuops_executed_port.port_6_coreuops_executed_port.port_7_corecycle_activity.cycles_l2_pendingcycle_activity.cycles_ldm_pendingcycle_activity.cycles_no_executecycle_activity.cycles_l1d_pendinguops_retired.core_stall_cyclesDTLB Misses x 30: Estimated Stallscycle_activity.cycles_l2_pending_cyclescycle_activity.cycles_ldm_pending_cyclescycle_activity.cycles_l1d_pending_cyclesdtlb_load_misses.demand_ld_walk_completeddtlb_load_misses.demand_ld_walk_durationpartial_rat_stalls.flags_merge_uoppartial_rat_stalls.flags_merge_uop_cyclespartial_rat_stalls.slow_lea_windowresource_stalls2.all_prf_controloffcore_requests_outstanding.demand_data_rd_cyclesoffcore_requests_outstanding.all_data_rd_cyclesidq_uops_not_delivered.cycles_ge_1_uop_deliv.corecycle_activity.stalls_l2_pendingcycle_activity.stalls_ldm_pendingcycle_activity.cycles_no_dispatchcycle_activity.stalls_l1d_pendingl1d_blocks.bank_conflict_cyclesmem_load_retired.llc_unshared_hitL3 Cache Hit w/o Snoop x 35: Est. Stallsmem_load_retired.other_core_l2_hit_hitmL3 Cache Hit w/Snoop x 74: Est. StallsL3 Cache Misses x 180: Estimated StallsPartial Address Aliases x 3: Est. Stallsuops_executed.port234~cmask=1~inv=1uops_retired.any~cmask=1~inv=1memory_disambiguation.watch_cycleshw_int.cycles_pending_and_maskedl1d_pend_miss.load_buffers_fulloffcore_requests_outstanding.demand.read_dataoffcore_requests_outstanding.demand.read_codeoffcore_requests_outstanding.demand.rfooffcore_requests_outstanding.any.readsnoopq_requests_outstanding.datasnoopq_requests_outstanding.invalidatesnoopq_requests_outstanding.coders_uops_dispatched~cmask=1~inv=1rat_stalls.other_serialization_stallsTC_deliver_mode~threshold=0xf~complement=1~compare=1BSQ_cache_reference~emask=0x0507BSQ_cache_reference~emask=0x0007BSQ_cache_reference~emask=0x0500Cycles a hardware thread stalls at Select waiting for various conditions to be resolved that prevent it being selectedEstimated time stalled on a DTLB miss requiring a HW tablewalkEstimated time stalled on a DTLB miss with HW tablewalk unsuccessfulEstimated time stalled on Branch mispredictionsReg Window Spill/Fill Est StallsEstimated time stalled on flushing pipeline due to register window spill/fillFetch_stall_IC_miss_MB_full_cycFetch_stall_IC_miss_MB_avail_cycITLB miss and HW tablewalk successfully loaded translation for 8K pageITLB miss and HW tablewalk successfully loaded translation for 64K pageITLB miss and HW tablewalk successfully loaded translation for 4M pageITLB miss and HW tablewalk successfully loaded translation for 256M pageITLB miss and HW tablewalk successfully loaded translation for 16G pageITLB miss and HW tablewalk successfully loaded translation for 1T pageITLB miss and HW tablewalk unsuccessfulITLB miss and HW tablewalk search doneBranches delayed a few extra cycles because branch target not found in Branch Target CacheCycles a hardware thread stalls at Select because no instructions are availableCycles a hardware thread stalls at Select waiting with correct instructions when pipeline has to drain after branch mispredictionCycles a hardware thread stalls at Select waiting for prior instructions to commitCycles a hardware thread stalls at Select with instruction that cannot decode until prior instructions have committedCycles a hardware thread stalls at Select to prevent strand monopolizing resourcesCycles a hardware thread stalls at Select because no required tags are availableCycles a hardware thread was ready to have its instructions selected but another hardware thread was selected insteadCycles a hardware thread is not selectedITLB miss and HW tablewalk hit local L2DITLB miss and HW tablewalk hit local L3 or neighbor L2DITLB miss and HW tablewalk missed all local cachesDTLB miss and HW tablewalk hit local L2DDTLB miss and HW tablewalk hit local L3 or neighbor L2DDTLB miss and HW tablewalk missed all local cachesDTLB miss requiring HW tablewalkFP and VIS instructions completed by the Floating Point and Graphics UnitBlock load/store instructions completedSpecialized instructions that require internal use of SPR ring completedAtomic instructions, including CASA/XA, completedPREFETCH and PREFETCHA instructions completedBasic arithmetic and logical instructions completedControl transfer instructions completed, excluding trap-related transfersBranch instructions taken and completedFetch_stall_BDA_tag_unavail_cycFetch_stall_BTA_tag_unavail_cycL2I_stall_no_request_credit_cycL2I_stall_no_response_credit_cycPipeline flushes to prevent thread from monopolizing resourcesPipeline flushes due to a branch mispredictionPipeline flushes due to SPARC architecture exceptions and trap entry/returnPipeline flushes due to detecting floating point evil twin conditionPipeline flushes to refetch Next-PCPipeline flushes due to strand mode changePipeline flushes due to detecting misaligned load/store requiring transition to misaligned mitigation modePipeline flushes due to hardware thread state change to/from halted/paused statePipeline flushes due to any reasonPipeline flushes due to spill_n_normal exceptionPipeline flushes due to spill_n_other exceptionPipeline flushes due to fill_n_normal exceptionPipeline flushes due to fill_n_other exceptionPipeline flushes due to spill/fill exceptionsPipeline flushes due to speculatively executed load violating memory orderBranch instructions completed whose direction was mispredictedBranch instructions completed whose target was mispredictedBranch instructions completed whose direction or target was mispredictedL2D_stall_no_request_credit_cycL2D_stall_no_response_credit_cycLoads that speculatively hit local L2DLoads that speculatively hit local L3Loads that speculatively hit local L3 but require copyback from L2D within same CPCLoads that speculatively hit neighbor L3 on same socketLoads that speculatively hit remote cache on different socketLoads that speculatively hit local memoryLoads that speculatively hit remote memoryLoads that speculatively missed local L1DDC_miss_L3_dirty_copyback_commitStores whose cacheline being updated was in local L2DStores whose cacheline being updated was in local L3Stores whose cacheline being updated was in neighbor L2 on same socketStores whose cacheline being updated was in neighbor L3 on same socketStores whose cacheline being updated was in remote cache on different socketStores whose cacheline being updated was in local memoryStores whose cacheline being updated was in remote memoryStores whose cacheline being updated was observed to be somewhere in the memory hierarchyLoads delayed by a previous store (read-after-write) still in store buffer not yet committedLoads delayed by a previous store (read-after-write) committed but in store queue not yet written to L2DLoads delayed by a previous store (read-after-write hazards)Cycles hardware thread is active in specified mode(s)DTLB miss and HW tablewalk successfully loaded translation for 8K pageDTLB miss and HW tablewalk successfully loaded translation for 64K pageDTLB miss and HW tablewalk successfully loaded translation for 4M pageDTLB miss and HW tablewalk successfully loaded translation for 256M pageDTLB miss and HW tablewalk successfully loaded translation for 16G pageDTLB miss and HW tablewalk successfully loaded translation for 1T pageDTLB miss and HW tablewalk unsuccessfulDTLB miss and HW tablewalk search doneCycles no uop commits from this hardware threadCycles no uop commits from any hardware thread on this coreStalls Another Thread SelectedCycles a hardware thread stalls at Select waiting for various conditions to be resolvedCycles that only 1 instruction or uop was selectedCycles that 2 instructions or uops were selectedSW Count instructions completedITLB miss and HW tablewalk successfully loaded translation for 2G or 16G pageDTLB miss and HW tablewalk successfully loaded translation for 2G or 16G pageLoads that speculatively hit local L1DLoads that speculatively hit neighbor L2D via local L3Loads that speculatively missed all caches on same socketLoads that speculatively missed local L2DLoads that speculatively missed local L3Pipeline flushes due to a load that misses L3 when more than 1 hardware thread is active on the coreCycles 1 uop commits from this hardware threadCycles 2 uops commit from this hardware threadCycles 1 or 2 uops commit from this hardware threadDC_miss_remote_L3_hit_nospec~emask=0x6Loads that speculatively hit local L2D or L3Loads that speculatively hit remote cache or remote memoryLoads that speculatively missed L1DL2 D-cache Read Misses (See Bug 15664448)1uLMNOPV` 					PVVVoVVVVVVVVVVVVoo)F)F0)F1u1u1u1u1uo1u1u1u1u1u1u1u1u1u1u1u1uggggoo)F)F)F'0)F0)Fo1u1u1u1u1u1u1u1u1u1u1u1u1u1u1u1u1u1u1ugggg1u1u1u1u1u1u1u1u1u1u1u1u1u1u1u1u1u1uoooooooo0)F)Foo)F)F00gggg<<<<<<
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