1 /*
2 * Copyright (c) 2014-2021 The strace developers.
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: LGPL-2.1-or-later
6 */
7
8 { 0, "PC(L)" },
9 { 4, "PC(U)" },
10 { 8, "SR(L)" },
11 { 12, "SR(U)" },
12 { 16, "syscall no.(L)" },
13 { 20, "syscall_no.(U)" },
14 { 24, "R0(L)" },
15 { 28, "R0(U)" },
16 { 32, "R1(L)" },
17 { 36, "R1(U)" },
18 { 40, "R2(L)" },
19 { 44, "R2(U)" },
20 { 48, "R3(L)" },
21 { 52, "R3(U)" },
22 { 56, "R4(L)" },
23 { 60, "R4(U)" },
24 { 64, "R5(L)" },
25 { 68, "R5(U)" },
26 { 72, "R6(L)" },
27 { 76, "R6(U)" },
28 { 80, "R7(L)" },
29 { 84, "R7(U)" },
30 { 88, "R8(L)" },
31 { 92, "R8(U)" },
32 { 96, "R9(L)" },
33 { 100, "R9(U)" },
34 { 104, "R10(L)" },
35 { 108, "R10(U)" },
36 { 112, "R11(L)" },
37 { 116, "R11(U)" },
38 { 120, "R12(L)" },
39 { 124, "R12(U)" },
40 { 128, "R13(L)" },
41 { 132, "R13(U)" },
42 { 136, "R14(L)" },
43 { 140, "R14(U)" },
44 { 144, "R15(L)" },
45 { 148, "R15(U)" },
46 { 152, "R16(L)" },
47 { 156, "R16(U)" },
48 { 160, "R17(L)" },
49 { 164, "R17(U)" },
50 { 168, "R18(L)" },
51 { 172, "R18(U)" },
52 { 176, "R19(L)" },
53 { 180, "R19(U)" },
54 { 184, "R20(L)" },
55 { 188, "R20(U)" },
56 { 192, "R21(L)" },
57 { 196, "R21(U)" },
58 { 200, "R22(L)" },
59 { 204, "R22(U)" },
60 { 208, "R23(L)" },
61 { 212, "R23(U)" },
62 { 216, "R24(L)" },
63 { 220, "R24(U)" },
64 { 224, "R25(L)" },
65 { 228, "R25(U)" },
66 { 232, "R26(L)" },
67 { 236, "R26(U)" },
68 { 240, "R27(L)" },
69 { 244, "R27(U)" },
70 { 248, "R28(L)" },
71 { 252, "R28(U)" },
72 { 256, "R29(L)" },
73 { 260, "R29(U)" },
74 { 264, "R30(L)" },
75 { 268, "R30(U)" },
76 { 272, "R31(L)" },
77 { 276, "R31(U)" },
78 { 280, "R32(L)" },
79 { 284, "R32(U)" },
80 { 288, "R33(L)" },
81 { 292, "R33(U)" },
82 { 296, "R34(L)" },
83 { 300, "R34(U)" },
84 { 304, "R35(L)" },
85 { 308, "R35(U)" },
86 { 312, "R36(L)" },
87 { 316, "R36(U)" },
88 { 320, "R37(L)" },
89 { 324, "R37(U)" },
90 { 328, "R38(L)" },
91 { 332, "R38(U)" },
92 { 336, "R39(L)" },
93 { 340, "R39(U)" },
94 { 344, "R40(L)" },
95 { 348, "R40(U)" },
96 { 352, "R41(L)" },
97 { 356, "R41(U)" },
98 { 360, "R42(L)" },
99 { 364, "R42(U)" },
100 { 368, "R43(L)" },
101 { 372, "R43(U)" },
102 { 376, "R44(L)" },
103 { 380, "R44(U)" },
104 { 384, "R45(L)" },
105 { 388, "R45(U)" },
106 { 392, "R46(L)" },
107 { 396, "R46(U)" },
108 { 400, "R47(L)" },
109 { 404, "R47(U)" },
110 { 408, "R48(L)" },
111 { 412, "R48(U)" },
112 { 416, "R49(L)" },
113 { 420, "R49(U)" },
114 { 424, "R50(L)" },
115 { 428, "R50(U)" },
116 { 432, "R51(L)" },
117 { 436, "R51(U)" },
118 { 440, "R52(L)" },
119 { 444, "R52(U)" },
120 { 448, "R53(L)" },
121 { 452, "R53(U)" },
122 { 456, "R54(L)" },
123 { 460, "R54(U)" },
124 { 464, "R55(L)" },
125 { 468, "R55(U)" },
126 { 472, "R56(L)" },
127 { 476, "R56(U)" },
128 { 480, "R57(L)" },
129 { 484, "R57(U)" },
130 { 488, "R58(L)" },
131 { 492, "R58(U)" },
132 { 496, "R59(L)" },
133 { 500, "R59(U)" },
134 { 504, "R60(L)" },
135 { 508, "R60(U)" },
136 { 512, "R61(L)" },
137 { 516, "R61(U)" },
138 { 520, "R62(L)" },
139 { 524, "R62(U)" },
140 { 528, "TR0(L)" },
141 { 532, "TR0(U)" },
142 { 536, "TR1(L)" },
143 { 540, "TR1(U)" },
144 { 544, "TR2(L)" },
145 { 548, "TR2(U)" },
146 { 552, "TR3(L)" },
147 { 556, "TR3(U)" },
148 { 560, "TR4(L)" },
149 { 564, "TR4(U)" },
150 { 568, "TR5(L)" },
151 { 572, "TR5(U)" },
152 { 576, "TR6(L)" },
153 { 580, "TR6(U)" },
154 { 584, "TR7(L)" },
155 { 588, "TR7(U)" },
156 /* Other fields in "struct user" */
157 /* This entry is in case pt_regs contains dregs (depends on
158 the kernel build options). */
159 XLAT_UOFF(regs),
160 XLAT_UOFF(fpu),
161 #include "../sh/userent0.h"