1 /* Machine-dependent software floating-point definitions.
2 Sparc userland (_Q_*) version.
3 Copyright (C) 1997-2023 Free Software Foundation, Inc.
4 This file is part of the GNU C Library.
5
6 The GNU C Library is free software; you can redistribute it and/or
7 modify it under the terms of the GNU Lesser General Public
8 License as published by the Free Software Foundation; either
9 version 2.1 of the License, or (at your option) any later version.
10
11 The GNU C Library is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 Lesser General Public License for more details.
15
16 You should have received a copy of the GNU Lesser General Public
17 License along with the GNU C Library; if not, see
18 <https://www.gnu.org/licenses/>. */
19
20 #include <fpu_control.h>
21 #include <stdlib.h>
22
23 #define _FP_W_TYPE_SIZE 32
24 #define _FP_W_TYPE unsigned long
25 #define _FP_WS_TYPE signed long
26 #define _FP_I_TYPE long
27
28 #define _FP_MUL_MEAT_S(R,X,Y) \
29 _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
30 #define _FP_MUL_MEAT_D(R,X,Y) \
31 _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
32 #define _FP_MUL_MEAT_Q(R,X,Y) \
33 _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
34
35 #define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y)
36 #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
37 #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
38
39 #define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
40 #define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1
41 #define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
42 #define _FP_NANSIGN_S 0
43 #define _FP_NANSIGN_D 0
44 #define _FP_NANSIGN_Q 0
45
46 #define _FP_KEEPNANFRACP 1
47 #define _FP_QNANNEGATEDP 0
48
49 /* If one NaN is signaling and the other is not,
50 * we choose that one, otherwise we choose X.
51 */
52 /* For _Qp_* and _Q_*, this should prefer X, for
53 * CPU instruction emulation this should prefer Y.
54 * (see SPAMv9 B.2.2 section).
55 */
56 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
57 do { \
58 if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \
59 && !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \
60 { \
61 R##_s = Y##_s; \
62 _FP_FRAC_COPY_##wc(R,Y); \
63 } \
64 else \
65 { \
66 R##_s = X##_s; \
67 _FP_FRAC_COPY_##wc(R,X); \
68 } \
69 R##_c = FP_CLS_NAN; \
70 } while (0)
71
72 /* Some assembly to speed things up. */
73 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \
74 __asm__ ("addcc %r7,%8,%2\n\
75 addxcc %r5,%6,%1\n\
76 addx %r3,%4,%0" \
77 : "=r" ((USItype)(r2)), \
78 "=&r" ((USItype)(r1)), \
79 "=&r" ((USItype)(r0)) \
80 : "%rJ" ((USItype)(x2)), \
81 "rI" ((USItype)(y2)), \
82 "%rJ" ((USItype)(x1)), \
83 "rI" ((USItype)(y1)), \
84 "%rJ" ((USItype)(x0)), \
85 "rI" ((USItype)(y0)) \
86 : "cc")
87
88 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \
89 __asm__ ("subcc %r7,%8,%2\n\
90 subxcc %r5,%6,%1\n\
91 subx %r3,%4,%0" \
92 : "=r" ((USItype)(r2)), \
93 "=&r" ((USItype)(r1)), \
94 "=&r" ((USItype)(r0)) \
95 : "%rJ" ((USItype)(x2)), \
96 "rI" ((USItype)(y2)), \
97 "%rJ" ((USItype)(x1)), \
98 "rI" ((USItype)(y1)), \
99 "%rJ" ((USItype)(x0)), \
100 "rI" ((USItype)(y0)) \
101 : "cc")
102
103 #define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \
104 do { \
105 /* We need to fool gcc, as we need to pass more than 10 \
106 input/outputs. */ \
107 register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \
108 __asm__ __volatile__ ("\
109 addcc %r8,%9,%1\n\
110 addxcc %r6,%7,%0\n\
111 addxcc %r4,%5,%%g2\n\
112 addx %r2,%3,%%g1" \
113 : "=&r" ((USItype)(r1)), \
114 "=&r" ((USItype)(r0)) \
115 : "%rJ" ((USItype)(x3)), \
116 "rI" ((USItype)(y3)), \
117 "%rJ" ((USItype)(x2)), \
118 "rI" ((USItype)(y2)), \
119 "%rJ" ((USItype)(x1)), \
120 "rI" ((USItype)(y1)), \
121 "%rJ" ((USItype)(x0)), \
122 "rI" ((USItype)(y0)) \
123 : "cc", "g1", "g2"); \
124 __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2)); \
125 r3 = _t1; r2 = _t2; \
126 } while (0)
127
128 #define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \
129 do { \
130 /* We need to fool gcc, as we need to pass more than 10 \
131 input/outputs. */ \
132 register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \
133 __asm__ __volatile__ ("\
134 subcc %r8,%9,%1\n\
135 subxcc %r6,%7,%0\n\
136 subxcc %r4,%5,%%g2\n\
137 subx %r2,%3,%%g1" \
138 : "=&r" ((USItype)(r1)), \
139 "=&r" ((USItype)(r0)) \
140 : "%rJ" ((USItype)(x3)), \
141 "rI" ((USItype)(y3)), \
142 "%rJ" ((USItype)(x2)), \
143 "rI" ((USItype)(y2)), \
144 "%rJ" ((USItype)(x1)), \
145 "rI" ((USItype)(y1)), \
146 "%rJ" ((USItype)(x0)), \
147 "rI" ((USItype)(y0)) \
148 : "cc", "g1", "g2"); \
149 __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2)); \
150 r3 = _t1; r2 = _t2; \
151 } while (0)
152
153 #define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0)
154
155 #define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y0)
156
157 #define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \
158 __asm__ ("addcc %3,%4,%3\n\
159 addxcc %2,%%g0,%2\n\
160 addxcc %1,%%g0,%1\n\
161 addx %0,%%g0,%0" \
162 : "=&r" ((USItype)(x3)), \
163 "=&r" ((USItype)(x2)), \
164 "=&r" ((USItype)(x1)), \
165 "=&r" ((USItype)(x0)) \
166 : "rI" ((USItype)(i)), \
167 "0" ((USItype)(x3)), \
168 "1" ((USItype)(x2)), \
169 "2" ((USItype)(x1)), \
170 "3" ((USItype)(x0)) \
171 : "cc")
172
173 /* Obtain the current rounding mode. */
174 #ifndef FP_ROUNDMODE
175 #define FP_ROUNDMODE ((_fcw >> 30) & 0x3)
176 #endif
177
178 /* Exception flags. */
179 #define FP_EX_INVALID (1 << 4)
180 #define FP_EX_OVERFLOW (1 << 3)
181 #define FP_EX_UNDERFLOW (1 << 2)
182 #define FP_EX_DIVZERO (1 << 1)
183 #define FP_EX_INEXACT (1 << 0)
184
185 #define _FP_TININESS_AFTER_ROUNDING 0
186
187 #define _FP_DECL_EX \
188 fpu_control_t _fcw __attribute__ ((unused)) = (FP_RND_NEAREST << 30)
189
190 #define FP_INIT_ROUNDMODE \
191 do { \
192 _FPU_GETCW(_fcw); \
193 } while (0)
194
195 #define FP_TRAPPING_EXCEPTIONS ((_fcw >> 23) & 0x1f)
196 #define FP_INHIBIT_RESULTS ((_fcw >> 23) & _fex)
197
198 /* Simulate exceptions using double arithmetics. */
199 extern void ___Q_simulate_exceptions(int exc);
200
201 #define FP_HANDLE_EXCEPTIONS \
202 do { \
203 if (!_fex) \
204 { \
205 /* This is the common case, so we do it inline. \
206 * We need to clear cexc bits if any. \
207 */ \
208 extern unsigned long long ___Q_zero; \
209 __asm__ __volatile__("ldd [%0], %%f30\n\t" \
210 "faddd %%f30, %%f30, %%f30" \
211 : : "r" (&___Q_zero) : "f30"); \
212 } \
213 else \
214 ___Q_simulate_exceptions (_fex); \
215 } while (0)