1  /* Copyright (C) 1997-2023 Free Software Foundation, Inc.
       2     This file is part of the GNU C Library.
       3  
       4     The GNU C Library is free software; you can redistribute it and/or
       5     modify it under the terms of the GNU Lesser General Public
       6     License as published by the Free Software Foundation; either
       7     version 2.1 of the License, or (at your option) any later version.
       8  
       9     The GNU C Library is distributed in the hope that it will be useful,
      10     but WITHOUT ANY WARRANTY; without even the implied warranty of
      11     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
      12     Lesser General Public License for more details.
      13  
      14     You should have received a copy of the GNU Lesser General Public
      15     License along with the GNU C Library; if not, see
      16     <https://www.gnu.org/licenses/>.  */
      17  
      18  #ifndef _FENV_H
      19  # error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
      20  #endif
      21  
      22  #include <bits/wordsize.h>
      23  
      24  
      25  /* Define bits representing the exception.  We use the bit positions
      26     of the appropriate accrued exception bits from the FSR.  */
      27  enum
      28    {
      29      FE_INVALID =
      30  #define FE_INVALID	(1 << 9)
      31        FE_INVALID,
      32      FE_OVERFLOW =
      33  #define FE_OVERFLOW	(1 << 8)
      34        FE_OVERFLOW,
      35      FE_UNDERFLOW =
      36  #define FE_UNDERFLOW	(1 << 7)
      37        FE_UNDERFLOW,
      38      FE_DIVBYZERO =
      39  #define FE_DIVBYZERO	(1 << 6)
      40        FE_DIVBYZERO,
      41      FE_INEXACT =
      42  #define FE_INEXACT	(1 << 5)
      43        FE_INEXACT
      44    };
      45  
      46  #define FE_ALL_EXCEPT \
      47  	(FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID)
      48  
      49  /* The Sparc FPU supports all of the four defined rounding modes.  We
      50     use again the bit positions in the FPU control word as the values
      51     for the appropriate macros.  */
      52  enum
      53    {
      54      FE_TONEAREST =
      55  #define FE_TONEAREST	(0 << 30)
      56        FE_TONEAREST,
      57      FE_TOWARDZERO =
      58  #define FE_TOWARDZERO	(1 << 30)
      59        FE_TOWARDZERO,
      60      FE_UPWARD =
      61  #define FE_UPWARD	(-0x7fffffff - 1) /* (2 << 30) */
      62        FE_UPWARD,
      63      FE_DOWNWARD =
      64  #define FE_DOWNWARD	(-0x40000000) /* (3 << 30) */
      65        FE_DOWNWARD
      66    };
      67  
      68  #define __FE_ROUND_MASK	(3U << 30)
      69  
      70  
      71  /* Type representing exception flags.  */
      72  typedef unsigned long int fexcept_t;
      73  
      74  
      75  /* Type representing floating-point environment.  */
      76  typedef unsigned long int fenv_t;
      77  
      78  /* If the default argument is used we use this value.  */
      79  #define FE_DFL_ENV	((const fenv_t *) -1)
      80  
      81  #ifdef __USE_GNU
      82  /* Floating-point environment where none of the exception is masked.  */
      83  # define FE_NOMASK_ENV	((const fenv_t *) -2)
      84  #endif
      85  
      86  #if __GLIBC_USE (IEC_60559_BFP_EXT_C2X)
      87  /* Type representing floating-point control modes.  */
      88  typedef unsigned long int femode_t;
      89  
      90  /* Default floating-point control modes.  */
      91  # define FE_DFL_MODE	((const femode_t *) -1L)
      92  #endif