(root)/
glibc-2.38/
sysdeps/
mips/
sys/
ucontext.h
       1  /* Copyright (C) 1998-2023 Free Software Foundation, Inc.
       2     This file is part of the GNU C Library.
       3  
       4     The GNU C Library is free software; you can redistribute it and/or
       5     modify it under the terms of the GNU Lesser General Public
       6     License as published by the Free Software Foundation; either
       7     version 2.1 of the License, or (at your option) any later version.
       8  
       9     The GNU C Library is distributed in the hope that it will be useful,
      10     but WITHOUT ANY WARRANTY; without even the implied warranty of
      11     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
      12     Lesser General Public License for more details.
      13  
      14     You should have received a copy of the GNU Lesser General Public
      15     License along with the GNU C Library.  If not, see
      16     <https://www.gnu.org/licenses/>.  */
      17  
      18  /* System V/mips ABI compliant context switching support.  */
      19  
      20  #ifndef _SYS_UCONTEXT_H
      21  #define _SYS_UCONTEXT_H	1
      22  
      23  #include <features.h>
      24  
      25  #include <bits/types.h>
      26  #include <bits/types/sigset_t.h>
      27  #include <bits/types/stack_t.h>
      28  
      29  #include <sgidefs.h>
      30  
      31  
      32  /* Type for general register.  */
      33  #if _MIPS_SIM == _ABIO32
      34  typedef __uint32_t greg_t;
      35  #else
      36  typedef __uint64_t greg_t;
      37  #endif
      38  
      39  /* Number of general registers.  */
      40  #define __NGREG	36
      41  #ifdef __USE_MISC
      42  # define NGREG	__NGREG
      43  #endif
      44  
      45  /* Container for all general registers.  */
      46  typedef greg_t gregset_t[__NGREG];
      47  
      48  #ifdef __USE_MISC
      49  /* Number of each register is the `gregset_t' array.  */
      50  enum
      51  {
      52    CTX_R0 = 0,
      53  # define CTX_R0	CTX_R0
      54    CTX_AT = 1,
      55  # define CTX_AT	CTX_AT
      56    CTX_V0 = 2,
      57  # define CTX_V0	CTX_V0
      58    CTX_V1 = 3,
      59  # define CTX_V1	CTX_V1
      60    CTX_A0 = 4,
      61  # define CTX_A0	CTX_A0
      62    CTX_A1 = 5,
      63  # define CTX_A1	CTX_A1
      64    CTX_A2 = 6,
      65  # define CTX_A2	CTX_A2
      66    CTX_A3 = 7,
      67  # define CTX_A3	CTX_A3
      68    CTX_T0 = 8,
      69  # define CTX_T0	CTX_T0
      70    CTX_T1 = 9,
      71  # define CTX_T1	CTX_T1
      72    CTX_T2 = 10,
      73  # define CTX_T2	CTX_T2
      74    CTX_T3 = 11,
      75  # define CTX_T3	CTX_T3
      76    CTX_T4 = 12,
      77  # define CTX_T4	CTX_T4
      78    CTX_T5 = 13,
      79  # define CTX_T5	CTX_T5
      80    CTX_T6 = 14,
      81  # define CTX_T6	CTX_T6
      82    CTX_T7 = 15,
      83  # define CTX_T7	CTX_T7
      84    CTX_S0 = 16,
      85  # define CTX_S0	CTX_S0
      86    CTX_S1 = 17,
      87  # define CTX_S1	CTX_S1
      88    CTX_S2 = 18,
      89  # define CTX_S2	CTX_S2
      90    CTX_S3 = 19,
      91  # define CTX_S3	CTX_S3
      92    CTX_S4 = 20,
      93  # define CTX_S4	CTX_S4
      94    CTX_S5 = 21,
      95  # define CTX_S5	CTX_S5
      96    CTX_S6 = 22,
      97  # define CTX_S6	CTX_S6
      98    CTX_S7 = 23,
      99  # define CTX_S7	CTX_S7
     100    CTX_T8 = 24,
     101  # define CTX_T8	CTX_T8
     102    CTX_T9 = 25,
     103  # define CTX_T9	CTX_T9
     104    CTX_K0 = 26,
     105  # define CTX_K0	CTX_K0
     106    CTX_K1 = 27,
     107  # define CTX_K1	CTX_K1
     108    CTX_GP = 28,
     109  # define CTX_GP	CTX_GP
     110    CTX_SP = 29,
     111  # define CTX_SP	CTX_SP
     112    CTX_S8 = 30,
     113  # define CTX_S8	CTX_S8
     114    CTX_RA = 31,
     115  # define CTX_RA	CTX_RA
     116    CTX_MDLO = 32,
     117  # define CTX_MDLO	CTX_MDLO
     118    CTX_MDHI = 33,
     119  # define CTX_MDHI	CTX_MDHI
     120    CTX_CAUSE = 34,
     121  # define CTX_CAUSE	CTX_CAUSE
     122    CTX_EPC = 35,
     123  # define CTX_EPC	CTX_EPC
     124  };
     125  #endif
     126  
     127  #ifdef __USE_MISC
     128  # define __ctx(fld) fld
     129  #else
     130  # define __ctx(fld) __ ## fld
     131  #endif
     132  
     133  /* Structure to describe FPU registers.  */
     134  typedef struct
     135  {
     136    union
     137    {
     138  #if _MIPS_SIM == _ABIO32
     139      double __ctx(fp_dregs)[16];
     140      float __ctx(fp_fregs)[32];
     141      unsigned int __ctx(fp_regs)[32];
     142  #else
     143      double __ctx(fp_dregs)[32];
     144      /* float __ctx(fp_fregs)[32]; */
     145      __uint64_t __ctx(fp_regs)[32];
     146  #endif
     147    } __ctx(fp_r);
     148    unsigned int __ctx(fp_csr);
     149    unsigned int __ctx(fp_pad);
     150  } fpregset_t;
     151  
     152  /* Context to describe whole processor state.  */
     153  typedef struct
     154  {
     155    gregset_t __ctx(gpregs);
     156    fpregset_t __ctx(fpregs);
     157  } mcontext_t;
     158  
     159  /* Userlevel context.  */
     160  typedef struct ucontext_t
     161  {
     162  #if _MIPS_SIM == _ABIO32
     163    unsigned long int __ctx(uc_flags);
     164  #else
     165    __uint64_t __ctx(uc_flags);
     166  #endif
     167    struct ucontext_t *uc_link;
     168    sigset_t uc_sigmask;
     169    stack_t uc_stack;
     170    mcontext_t uc_mcontext;
     171    int __glibc_reserved1[48];
     172  } ucontext_t;
     173  
     174  #undef __ctx
     175  
     176  #endif /* sys/ucontext.h */