1 /* Copyright (C) 2003-2023 Free Software Foundation, Inc.
2
3 This file is part of the GNU C Library.
4
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
9
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
14
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library. If not, see
17 <https://www.gnu.org/licenses/>. */
18
19 #include <sysdep.h>
20
21 #define __HAVE_64B_ATOMICS 0
22 #define USE_ATOMIC_COMPILER_BUILTINS 0
23
24 /* XXX Is this actually correct? */
25 #define ATOMIC_EXCHANGE_USES_CAS 1
26
27
28 /* Microblaze does not have byte and halfword forms of load and reserve and
29 store conditional. So for microblaze we stub out the 8- and 16-bit forms. */
30 #define __arch_compare_and_exchange_bool_8_acq(mem, newval, oldval) \
31 (abort (), 0)
32
33 #define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \
34 (abort (), 0)
35
36 #define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
37 ({ \
38 __typeof (*(mem)) __tmp; \
39 __typeof (mem) __memp = (mem); \
40 int test; \
41 __asm __volatile ( \
42 " addc r0, r0, r0;" \
43 "1: lwx %0, %3, r0;" \
44 " addic %1, r0, 0;" \
45 " bnei %1, 1b;" \
46 " cmp %1, %0, %4;" \
47 " bnei %1, 2f;" \
48 " swx %5, %3, r0;" \
49 " addic %1, r0, 0;" \
50 " bnei %1, 1b;" \
51 "2:" \
52 : "=&r" (__tmp), \
53 "=&r" (test), \
54 "=m" (*__memp) \
55 : "r" (__memp), \
56 "r" (oldval), \
57 "r" (newval) \
58 : "cc", "memory"); \
59 __tmp; \
60 })
61
62 #define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
63 (abort (), (__typeof (*mem)) 0)
64
65 #define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
66 ({ \
67 __typeof (*(mem)) __result; \
68 if (sizeof (*mem) == 4) \
69 __result = __arch_compare_and_exchange_val_32_acq (mem, newval, oldval); \
70 else if (sizeof (*mem) == 8) \
71 __result = __arch_compare_and_exchange_val_64_acq (mem, newval, oldval); \
72 else \
73 abort (); \
74 __result; \
75 })
76
77 #define atomic_compare_and_exchange_val_rel(mem, newval, oldval) \
78 ({ \
79 __typeof (*(mem)) __result; \
80 if (sizeof (*mem) == 4) \
81 __result = __arch_compare_and_exchange_val_32_acq (mem, newval, oldval); \
82 else if (sizeof (*mem) == 8) \
83 __result = __arch_compare_and_exchange_val_64_acq (mem, newval, oldval); \
84 else \
85 abort (); \
86 __result; \
87 })
88
89 #define __arch_atomic_exchange_32_acq(mem, value) \
90 ({ \
91 __typeof (*(mem)) __tmp; \
92 __typeof (mem) __memp = (mem); \
93 int test; \
94 __asm __volatile ( \
95 " addc r0, r0, r0;" \
96 "1: lwx %0, %4, r0;" \
97 " addic %1, r0, 0;" \
98 " bnei %1, 1b;" \
99 " swx %3, %4, r0;" \
100 " addic %1, r0, 0;" \
101 " bnei %1, 1b;" \
102 : "=&r" (__tmp), \
103 "=&r" (test), \
104 "=m" (*__memp) \
105 : "r" (value), \
106 "r" (__memp) \
107 : "cc", "memory"); \
108 __tmp; \
109 })
110
111 #define __arch_atomic_exchange_64_acq(mem, newval) \
112 (abort (), (__typeof (*mem)) 0)
113
114 #define atomic_exchange_acq(mem, value) \
115 ({ \
116 __typeof (*(mem)) __result; \
117 if (sizeof (*mem) == 4) \
118 __result = __arch_atomic_exchange_32_acq (mem, value); \
119 else if (sizeof (*mem) == 8) \
120 __result = __arch_atomic_exchange_64_acq (mem, value); \
121 else \
122 abort (); \
123 __result; \
124 })
125
126 #define atomic_exchange_rel(mem, value) \
127 ({ \
128 __typeof (*(mem)) __result; \
129 if (sizeof (*mem) == 4) \
130 __result = __arch_atomic_exchange_32_acq (mem, value); \
131 else if (sizeof (*mem) == 8) \
132 __result = __arch_atomic_exchange_64_acq (mem, value); \
133 else \
134 abort (); \
135 __result; \
136 })
137
138 #define __arch_atomic_exchange_and_add_32(mem, value) \
139 ({ \
140 __typeof (*(mem)) __tmp; \
141 __typeof (mem) __memp = (mem); \
142 int test; \
143 __asm __volatile ( \
144 " addc r0, r0, r0;" \
145 "1: lwx %0, %4, r0;" \
146 " addic %1, r0, 0;" \
147 " bnei %1, 1b;" \
148 " add %1, %3, %0;" \
149 " swx %1, %4, r0;" \
150 " addic %1, r0, 0;" \
151 " bnei %1, 1b;" \
152 : "=&r" (__tmp), \
153 "=&r" (test), \
154 "=m" (*__memp) \
155 : "r" (value), \
156 "r" (__memp) \
157 : "cc", "memory"); \
158 __tmp; \
159 })
160
161 #define __arch_atomic_exchange_and_add_64(mem, value) \
162 (abort (), (__typeof (*mem)) 0)
163
164 #define atomic_exchange_and_add(mem, value) \
165 ({ \
166 __typeof (*(mem)) __result; \
167 if (sizeof (*mem) == 4) \
168 __result = __arch_atomic_exchange_and_add_32 (mem, value); \
169 else if (sizeof (*mem) == 8) \
170 __result = __arch_atomic_exchange_and_add_64 (mem, value); \
171 else \
172 abort (); \
173 __result; \
174 })
175
176 #define __arch_atomic_increment_val_32(mem) \
177 ({ \
178 __typeof (*(mem)) __val; \
179 int test; \
180 __asm __volatile ( \
181 " addc r0, r0, r0;" \
182 "1: lwx %0, %3, r0;" \
183 " addic %1, r0, 0;" \
184 " bnei %1, 1b;" \
185 " addi %0, %0, 1;" \
186 " swx %0, %3, r0;" \
187 " addic %1, r0, 0;" \
188 " bnei %1, 1b;" \
189 : "=&r" (__val), \
190 "=&r" (test), \
191 "=m" (*mem) \
192 : "r" (mem), \
193 "m" (*mem) \
194 : "cc", "memory"); \
195 __val; \
196 })
197
198 #define __arch_atomic_increment_val_64(mem) \
199 (abort (), (__typeof (*mem)) 0)
200
201 #define atomic_increment_val(mem) \
202 ({ \
203 __typeof (*(mem)) __result; \
204 if (sizeof (*(mem)) == 4) \
205 __result = __arch_atomic_increment_val_32 (mem); \
206 else if (sizeof (*(mem)) == 8) \
207 __result = __arch_atomic_increment_val_64 (mem); \
208 else \
209 abort (); \
210 __result; \
211 })
212
213 #define atomic_increment(mem) ({ atomic_increment_val (mem); (void) 0; })
214
215 #define __arch_atomic_decrement_val_32(mem) \
216 ({ \
217 __typeof (*(mem)) __val; \
218 int test; \
219 __asm __volatile ( \
220 " addc r0, r0, r0;" \
221 "1: lwx %0, %3, r0;" \
222 " addic %1, r0, 0;" \
223 " bnei %1, 1b;" \
224 " rsubi %0, %0, 1;" \
225 " swx %0, %3, r0;" \
226 " addic %1, r0, 0;" \
227 " bnei %1, 1b;" \
228 : "=&r" (__val), \
229 "=&r" (test), \
230 "=m" (*mem) \
231 : "r" (mem), \
232 "m" (*mem) \
233 : "cc", "memory"); \
234 __val; \
235 })
236
237 #define __arch_atomic_decrement_val_64(mem) \
238 (abort (), (__typeof (*mem)) 0)
239
240 #define atomic_decrement_val(mem) \
241 ({ \
242 __typeof (*(mem)) __result; \
243 if (sizeof (*(mem)) == 4) \
244 __result = __arch_atomic_decrement_val_32 (mem); \
245 else if (sizeof (*(mem)) == 8) \
246 __result = __arch_atomic_decrement_val_64 (mem); \
247 else \
248 abort (); \
249 __result; \
250 })
251
252 #define atomic_decrement(mem) ({ atomic_decrement_val (mem); (void) 0; })