(root)/
gcc-13.2.0/
libitm/
config/
linux/
sh/
futex_bits.h
       1  /* Copyright (C) 2011-2023 Free Software Foundation, Inc.
       2  
       3     This file is part of the GNU Transactional Memory Library (libitm).
       4  
       5     Libitm is free software; you can redistribute it and/or modify it
       6     under the terms of the GNU General Public License as published by
       7     the Free Software Foundation; either version 3 of the License, or
       8     (at your option) any later version.
       9  
      10     Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
      11     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
      12     FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
      13     more details.
      14  
      15     Under Section 7 of GPL version 3, you are granted additional
      16     permissions described in the GCC Runtime Library Exception, version
      17     3.1, as published by the Free Software Foundation.
      18  
      19     You should have received a copy of the GNU General Public License and
      20     a copy of the GCC Runtime Library Exception along with this program;
      21     see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
      22     <http://www.gnu.org/licenses/>.  */
      23  
      24  /* Provide target-specific access to the futex system call.  */
      25  
      26  #include <sys/syscall.h>
      27  
      28  /* 4 instruction cycles not accessing cache and TLB are needed after
      29     trapa instruction to avoid an SH-4 silicon bug.  */
      30  
      31  #define SYSCALL_WITH_INST_PAD "\
      32         trapa #0x14; or r0,r0; or r0,r0; or r0,r0; or r0,r0; or r0,r0"
      33  
      34  static inline long
      35  sys_futex0 (std::atomic<int> *addr, int op, int val)
      36  {
      37    int __status;
      38    register long __r3 asm ("r3") = SYS_futex;
      39    register long __r4 asm ("r4") = (long) addr;
      40    register long __r5 asm ("r5") = op;
      41    register long __r6 asm ("r6") = val;
      42    register long __r7 asm ("r7") = 0;
      43  
      44    __asm __volatile (SYSCALL_WITH_INST_PAD
      45  		    : "=z" (__status)
      46  		    : "r" (__r3), "r" (__r4), "r" (__r5),
      47  		    "r" (__r6), "r" (__r7)
      48  		    : "memory", "t");
      49    return __status;
      50  }