(root)/
gcc-13.2.0/
libgcc/
config/
ia64/
sfp-machine.h
       1  #define _FP_W_TYPE_SIZE		64
       2  #define _FP_W_TYPE		unsigned long
       3  #define _FP_WS_TYPE		signed long
       4  #define _FP_I_TYPE		long
       5  
       6  typedef int TItype __attribute__ ((mode (TI)));
       7  typedef unsigned int UTItype __attribute__ ((mode (TI)));
       8  
       9  #define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))
      10  
      11  /* The type of the result of a floating point comparison.  This must
      12     match `__libgcc_cmp_return__' in GCC for the target.  */
      13  typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
      14  #define CMPtype __gcc_CMPtype
      15  
      16  #define _FP_MUL_MEAT_Q(R,X,Y)				\
      17    _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
      18  
      19  #define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
      20  
      21  #define _FP_NANFRAC_S		_FP_QNANBIT_S
      22  #define _FP_NANFRAC_D		_FP_QNANBIT_D
      23  #define _FP_NANFRAC_E		_FP_QNANBIT_E, 0
      24  #define _FP_NANFRAC_Q		_FP_QNANBIT_Q, 0
      25  
      26  #define _FP_KEEPNANFRACP	1
      27  #define _FP_QNANNEGATEDP 0
      28  
      29  #define _FP_NANSIGN_S		1
      30  #define _FP_NANSIGN_D		1
      31  #define _FP_NANSIGN_E		1
      32  #define _FP_NANSIGN_Q		1
      33  
      34  /* Here is something Intel misdesigned: the specs don't define
      35     the case where we have two NaNs with same mantissas, but
      36     different sign. Different operations pick up different NaNs.  */
      37  #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
      38    do {								\
      39      if (_FP_FRAC_GT_##wc(X, Y)					\
      40  	|| (_FP_FRAC_EQ_##wc(X,Y) && (OP == '+' || OP == '*')))	\
      41        {								\
      42  	R##_s = X##_s;						\
      43  	_FP_FRAC_COPY_##wc(R,X);				\
      44        }								\
      45      else							\
      46        {								\
      47  	R##_s = Y##_s;						\
      48  	_FP_FRAC_COPY_##wc(R,Y);				\
      49        }								\
      50      R##_c = FP_CLS_NAN;						\
      51    } while (0)
      52  
      53  #define FP_EX_INVALID		0x01
      54  #define FP_EX_DENORM		0x02
      55  #define FP_EX_DIVZERO		0x04
      56  #define FP_EX_OVERFLOW		0x08
      57  #define FP_EX_UNDERFLOW		0x10
      58  #define FP_EX_INEXACT		0x20
      59  #define FP_EX_ALL \
      60  	(FP_EX_INVALID | FP_EX_DENORM | FP_EX_DIVZERO | FP_EX_OVERFLOW \
      61  	 | FP_EX_UNDERFLOW | FP_EX_INEXACT)
      62  
      63  #define _FP_TININESS_AFTER_ROUNDING 1
      64  
      65  void __sfp_handle_exceptions (int);
      66  
      67  #define FP_HANDLE_EXCEPTIONS			\
      68    do {						\
      69      if (__builtin_expect (_fex, 0))		\
      70        __sfp_handle_exceptions (_fex);		\
      71    } while (0)
      72  
      73  #define FP_TRAPPING_EXCEPTIONS	(~_fcw & FP_EX_ALL)
      74  
      75  #define FP_RND_NEAREST		0
      76  #define FP_RND_ZERO		0xc00L
      77  #define FP_RND_PINF		0x800L
      78  #define FP_RND_MINF		0x400L
      79  
      80  #define FP_RND_MASK		0xc00L
      81  
      82  #define _FP_DECL_EX \
      83    unsigned long int _fcw __attribute__ ((unused)) = FP_RND_NEAREST
      84  
      85  #define FP_INIT_ROUNDMODE					\
      86    do {								\
      87      __asm__ __volatile__ ("mov.m %0 = ar.fpsr" : "=r" (_fcw));	\
      88    } while (0)
      89  
      90  #define FP_ROUNDMODE		(_fcw & FP_RND_MASK)
      91  
      92  #define	__LITTLE_ENDIAN	1234
      93  #define	__BIG_ENDIAN	4321
      94  
      95  #define __BYTE_ORDER __LITTLE_ENDIAN
      96  
      97  /* Define ALIASNAME as a strong alias for NAME.  */
      98  #define strong_alias(name, aliasname) _strong_alias(name, aliasname)
      99  #define _strong_alias(name, aliasname) \
     100    extern __typeof (name) aliasname __attribute__ ((alias (#name)));