1 /* Xtensa configuration settings.
2 Copyright (C) 2022-2023 Free Software Foundation, Inc.
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2, or (at your option)
7 any later version.
8
9 This program is distributed in the hope that it will be useful, but
10 WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
17
18 #ifndef XTENSA_DYNCONFIG_H
19 #define XTENSA_DYNCONFIG_H
20
21 #ifdef __cplusplus
22 extern "C" {
23 #endif
24
25 /*
26 * Config versioning.
27 *
28 * When new config entries need to be passed through dynconfig
29 * create new xtensa_config_v<N> structure and put them there.
30 * Declare new function xtensa_get_config_v<N> (void).
31 * Define corresponding X*HAL_* macros by accessing xtensa_get_config_v<N> ().
32 * Define macro XTENSA_CONFIG_V<N>_ENTRY_LIST by listing
33 * XTENSA_CONFIG_ENTRY for every entry in the new structure.
34 * Add constant definition for the new xtensa_config_v<N> to the
35 * XTENSA_CONFIG_INSTANCE_LIST.
36 * Add XTENSA_CONFIG_V<N>_ENTRY_LIST to the XTENSA_CONFIG_ENTRY_LIST.
37 *
38 * On the user side (gcc/binutils/...) add definition for the function
39 * xtensa_get_config_v<N> (void).
40 */
41
42 struct xtensa_config_v1
43 {
44 int xchal_have_be;
45 int xchal_have_density;
46 int xchal_have_const16;
47 int xchal_have_abs;
48 int xchal_have_addx;
49 int xchal_have_l32r;
50 int xshal_use_absolute_literals;
51 int xshal_have_text_section_literals;
52 int xchal_have_mac16;
53 int xchal_have_mul16;
54 int xchal_have_mul32;
55 int xchal_have_mul32_high;
56 int xchal_have_div32;
57 int xchal_have_nsa;
58 int xchal_have_minmax;
59 int xchal_have_sext;
60 int xchal_have_loops;
61 int xchal_have_threadptr;
62 int xchal_have_release_sync;
63 int xchal_have_s32c1i;
64 int xchal_have_booleans;
65 int xchal_have_fp;
66 int xchal_have_fp_div;
67 int xchal_have_fp_recip;
68 int xchal_have_fp_sqrt;
69 int xchal_have_fp_rsqrt;
70 int xchal_have_fp_postinc;
71 int xchal_have_dfp;
72 int xchal_have_dfp_div;
73 int xchal_have_dfp_recip;
74 int xchal_have_dfp_sqrt;
75 int xchal_have_dfp_rsqrt;
76 int xchal_have_windowed;
77 int xchal_num_aregs;
78 int xchal_have_wide_branches;
79 int xchal_have_predicted_branches;
80 int xchal_icache_size;
81 int xchal_dcache_size;
82 int xchal_icache_linesize;
83 int xchal_dcache_linesize;
84 int xchal_icache_linewidth;
85 int xchal_dcache_linewidth;
86 int xchal_dcache_is_writeback;
87 int xchal_have_mmu;
88 int xchal_mmu_min_pte_page_size;
89 int xchal_have_debug;
90 int xchal_num_ibreak;
91 int xchal_num_dbreak;
92 int xchal_debuglevel;
93 int xchal_max_instruction_size;
94 int xchal_inst_fetch_width;
95 int xshal_abi;
96 int xthal_abi_windowed;
97 int xthal_abi_call0;
98 };
99
100 struct xtensa_config_v2
101 {
102 int xchal_m_stage;
103 int xtensa_march_latest;
104 int xtensa_march_earliest;
105 };
106
107 struct xtensa_config_v3
108 {
109 int xchal_have_clamps;
110 int xchal_have_depbits;
111 int xchal_have_exclusive;
112 int xchal_have_xea3;
113 };
114
115 typedef struct xtensa_isa_internal_struct xtensa_isa_internal;
116
117 extern const void *xtensa_load_config (const char *name,
118 const void *no_plugin_def,
119 const void *no_name_def);
120 extern const struct xtensa_config_v1 *xtensa_get_config_v1 (void);
121 extern const struct xtensa_config_v2 *xtensa_get_config_v2 (void);
122 extern const struct xtensa_config_v3 *xtensa_get_config_v3 (void);
123
124 #ifdef XTENSA_CONFIG_DEFINITION
125
126 #ifndef XCHAL_HAVE_MUL32_HIGH
127 #define XCHAL_HAVE_MUL32_HIGH 0
128 #endif
129
130 #ifndef XCHAL_HAVE_RELEASE_SYNC
131 #define XCHAL_HAVE_RELEASE_SYNC 0
132 #endif
133
134 #ifndef XCHAL_HAVE_S32C1I
135 #define XCHAL_HAVE_S32C1I 0
136 #endif
137
138 #ifndef XCHAL_HAVE_THREADPTR
139 #define XCHAL_HAVE_THREADPTR 0
140 #endif
141
142 #ifndef XCHAL_HAVE_FP_POSTINC
143 #define XCHAL_HAVE_FP_POSTINC 0
144 #endif
145
146 #ifndef XCHAL_HAVE_DFP
147 #define XCHAL_HAVE_DFP 0
148 #endif
149
150 #ifndef XCHAL_HAVE_DFP_DIV
151 #define XCHAL_HAVE_DFP_DIV 0
152 #endif
153
154 #ifndef XCHAL_HAVE_DFP_RECIP
155 #define XCHAL_HAVE_DFP_RECIP 0
156 #endif
157
158 #ifndef XCHAL_HAVE_DFP_SQRT
159 #define XCHAL_HAVE_DFP_SQRT 0
160 #endif
161
162 #ifndef XCHAL_HAVE_DFP_RSQRT
163 #define XCHAL_HAVE_DFP_RSQRT 0
164 #endif
165
166 #ifndef XSHAL_HAVE_TEXT_SECTION_LITERALS
167 #define XSHAL_HAVE_TEXT_SECTION_LITERALS 0
168 #endif
169
170 #ifndef XCHAL_MMU_MIN_PTE_PAGE_SIZE
171 #define XCHAL_MMU_MIN_PTE_PAGE_SIZE 1
172 #endif
173
174 #ifndef XTHAL_ABI_WINDOWED
175 #define XTHAL_ABI_WINDOWED 0
176 #endif
177
178 #ifndef XTHAL_ABI_CALL0
179 #define XTHAL_ABI_CALL0 1
180 #endif
181
182 #ifndef XCHAL_M_STAGE
183 #define XCHAL_M_STAGE 0
184 #endif
185
186 #ifndef XTENSA_MARCH_LATEST
187 #define XTENSA_MARCH_LATEST 0
188 #endif
189
190 #ifndef XTENSA_MARCH_EARLIEST
191 #define XTENSA_MARCH_EARLIEST 0
192 #endif
193
194 #ifndef XCHAL_HAVE_CLAMPS
195 #define XCHAL_HAVE_CLAMPS 0
196 #endif
197
198 #ifndef XCHAL_HAVE_DEPBITS
199 #define XCHAL_HAVE_DEPBITS 0
200 #endif
201
202 #ifndef XCHAL_HAVE_EXCLUSIVE
203 #define XCHAL_HAVE_EXCLUSIVE 0
204 #endif
205
206 #ifndef XCHAL_HAVE_XEA3
207 #define XCHAL_HAVE_XEA3 0
208 #endif
209
210 #define XTENSA_CONFIG_ENTRY(a) a
211
212 #define XTENSA_CONFIG_V1_ENTRY_LIST \
213 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_BE), \
214 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DENSITY), \
215 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_CONST16), \
216 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_ABS), \
217 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_ADDX), \
218 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_L32R), \
219 XTENSA_CONFIG_ENTRY(XSHAL_USE_ABSOLUTE_LITERALS), \
220 XTENSA_CONFIG_ENTRY(XSHAL_HAVE_TEXT_SECTION_LITERALS), \
221 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MAC16), \
222 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL16), \
223 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL32), \
224 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL32_HIGH), \
225 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DIV32), \
226 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_NSA), \
227 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MINMAX), \
228 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_SEXT), \
229 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_LOOPS), \
230 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_THREADPTR), \
231 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_RELEASE_SYNC), \
232 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_S32C1I), \
233 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_BOOLEANS), \
234 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP), \
235 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_DIV), \
236 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_RECIP), \
237 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_SQRT), \
238 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_RSQRT), \
239 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_POSTINC), \
240 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP), \
241 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_DIV), \
242 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_RECIP), \
243 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_SQRT), \
244 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_RSQRT), \
245 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_WINDOWED), \
246 XTENSA_CONFIG_ENTRY(XCHAL_NUM_AREGS), \
247 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_WIDE_BRANCHES), \
248 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_PREDICTED_BRANCHES), \
249 XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_SIZE), \
250 XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_SIZE), \
251 XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_LINESIZE), \
252 XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_LINESIZE), \
253 XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_LINEWIDTH), \
254 XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_LINEWIDTH), \
255 XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_IS_WRITEBACK), \
256 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MMU), \
257 XTENSA_CONFIG_ENTRY(XCHAL_MMU_MIN_PTE_PAGE_SIZE), \
258 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DEBUG), \
259 XTENSA_CONFIG_ENTRY(XCHAL_NUM_IBREAK), \
260 XTENSA_CONFIG_ENTRY(XCHAL_NUM_DBREAK), \
261 XTENSA_CONFIG_ENTRY(XCHAL_DEBUGLEVEL), \
262 XTENSA_CONFIG_ENTRY(XCHAL_MAX_INSTRUCTION_SIZE), \
263 XTENSA_CONFIG_ENTRY(XCHAL_INST_FETCH_WIDTH), \
264 XTENSA_CONFIG_ENTRY(XSHAL_ABI), \
265 XTENSA_CONFIG_ENTRY(XTHAL_ABI_WINDOWED), \
266 XTENSA_CONFIG_ENTRY(XTHAL_ABI_CALL0)
267
268 #define XTENSA_CONFIG_V2_ENTRY_LIST \
269 XTENSA_CONFIG_ENTRY(XCHAL_M_STAGE), \
270 XTENSA_CONFIG_ENTRY(XTENSA_MARCH_LATEST), \
271 XTENSA_CONFIG_ENTRY(XTENSA_MARCH_EARLIEST)
272
273 #define XTENSA_CONFIG_V3_ENTRY_LIST \
274 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_CLAMPS), \
275 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DEPBITS), \
276 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_EXCLUSIVE), \
277 XTENSA_CONFIG_ENTRY(XCHAL_HAVE_XEA3)
278
279 #define XTENSA_CONFIG_INSTANCE_LIST \
280 const struct xtensa_config_v1 xtensa_config_v1 = { \
281 XTENSA_CONFIG_V1_ENTRY_LIST, \
282 }; \
283 const struct xtensa_config_v2 xtensa_config_v2 = { \
284 XTENSA_CONFIG_V2_ENTRY_LIST, \
285 }; \
286 const struct xtensa_config_v3 xtensa_config_v3 = { \
287 XTENSA_CONFIG_V3_ENTRY_LIST, \
288 }
289
290 #define XTENSA_CONFIG_ENTRY_LIST \
291 XTENSA_CONFIG_V1_ENTRY_LIST, \
292 XTENSA_CONFIG_V2_ENTRY_LIST, \
293 XTENSA_CONFIG_V3_ENTRY_LIST
294
295 #else /* XTENSA_CONFIG_DEFINITION */
296
297 #undef XCHAL_HAVE_BE
298 #define XCHAL_HAVE_BE (xtensa_get_config_v1 ()->xchal_have_be)
299
300 #undef XCHAL_HAVE_DENSITY
301 #define XCHAL_HAVE_DENSITY (xtensa_get_config_v1 ()->xchal_have_density)
302
303 #undef XCHAL_HAVE_CONST16
304 #define XCHAL_HAVE_CONST16 (xtensa_get_config_v1 ()->xchal_have_const16)
305
306 #undef XCHAL_HAVE_ABS
307 #define XCHAL_HAVE_ABS (xtensa_get_config_v1 ()->xchal_have_abs)
308
309 #undef XCHAL_HAVE_ADDX
310 #define XCHAL_HAVE_ADDX (xtensa_get_config_v1 ()->xchal_have_addx)
311
312 #undef XCHAL_HAVE_L32R
313 #define XCHAL_HAVE_L32R (xtensa_get_config_v1 ()->xchal_have_l32r)
314
315 #undef XSHAL_USE_ABSOLUTE_LITERALS
316 #define XSHAL_USE_ABSOLUTE_LITERALS (xtensa_get_config_v1 ()->xshal_use_absolute_literals)
317
318 #undef XSHAL_HAVE_TEXT_SECTION_LITERALS
319 #define XSHAL_HAVE_TEXT_SECTION_LITERALS (xtensa_get_config_v1 ()->xshal_have_text_section_literals)
320
321 #undef XCHAL_HAVE_MAC16
322 #define XCHAL_HAVE_MAC16 (xtensa_get_config_v1 ()->xchal_have_mac16)
323
324 #undef XCHAL_HAVE_MUL16
325 #define XCHAL_HAVE_MUL16 (xtensa_get_config_v1 ()->xchal_have_mul16)
326
327 #undef XCHAL_HAVE_MUL32
328 #define XCHAL_HAVE_MUL32 (xtensa_get_config_v1 ()->xchal_have_mul32)
329
330 #undef XCHAL_HAVE_MUL32_HIGH
331 #define XCHAL_HAVE_MUL32_HIGH (xtensa_get_config_v1 ()->xchal_have_mul32_high)
332
333 #undef XCHAL_HAVE_DIV32
334 #define XCHAL_HAVE_DIV32 (xtensa_get_config_v1 ()->xchal_have_div32)
335
336 #undef XCHAL_HAVE_NSA
337 #define XCHAL_HAVE_NSA (xtensa_get_config_v1 ()->xchal_have_nsa)
338
339 #undef XCHAL_HAVE_MINMAX
340 #define XCHAL_HAVE_MINMAX (xtensa_get_config_v1 ()->xchal_have_minmax)
341
342 #undef XCHAL_HAVE_SEXT
343 #define XCHAL_HAVE_SEXT (xtensa_get_config_v1 ()->xchal_have_sext)
344
345 #undef XCHAL_HAVE_LOOPS
346 #define XCHAL_HAVE_LOOPS (xtensa_get_config_v1 ()->xchal_have_loops)
347
348 #undef XCHAL_HAVE_THREADPTR
349 #define XCHAL_HAVE_THREADPTR (xtensa_get_config_v1 ()->xchal_have_threadptr)
350
351 #undef XCHAL_HAVE_RELEASE_SYNC
352 #define XCHAL_HAVE_RELEASE_SYNC (xtensa_get_config_v1 ()->xchal_have_release_sync)
353
354 #undef XCHAL_HAVE_S32C1I
355 #define XCHAL_HAVE_S32C1I (xtensa_get_config_v1 ()->xchal_have_s32c1i)
356
357 #undef XCHAL_HAVE_BOOLEANS
358 #define XCHAL_HAVE_BOOLEANS (xtensa_get_config_v1 ()->xchal_have_booleans)
359
360 #undef XCHAL_HAVE_FP
361 #define XCHAL_HAVE_FP (xtensa_get_config_v1 ()->xchal_have_fp)
362
363 #undef XCHAL_HAVE_FP_DIV
364 #define XCHAL_HAVE_FP_DIV (xtensa_get_config_v1 ()->xchal_have_fp_div)
365
366 #undef XCHAL_HAVE_FP_RECIP
367 #define XCHAL_HAVE_FP_RECIP (xtensa_get_config_v1 ()->xchal_have_fp_recip)
368
369 #undef XCHAL_HAVE_FP_SQRT
370 #define XCHAL_HAVE_FP_SQRT (xtensa_get_config_v1 ()->xchal_have_fp_sqrt)
371
372 #undef XCHAL_HAVE_FP_RSQRT
373 #define XCHAL_HAVE_FP_RSQRT (xtensa_get_config_v1 ()->xchal_have_fp_rsqrt)
374
375 #undef XCHAL_HAVE_FP_POSTINC
376 #define XCHAL_HAVE_FP_POSTINC (xtensa_get_config_v1 ()->xchal_have_fp_postinc)
377
378 #undef XCHAL_HAVE_DFP
379 #define XCHAL_HAVE_DFP (xtensa_get_config_v1 ()->xchal_have_dfp)
380
381 #undef XCHAL_HAVE_DFP_DIV
382 #define XCHAL_HAVE_DFP_DIV (xtensa_get_config_v1 ()->xchal_have_dfp_div)
383
384 #undef XCHAL_HAVE_DFP_RECIP
385 #define XCHAL_HAVE_DFP_RECIP (xtensa_get_config_v1 ()->xchal_have_dfp_recip)
386
387 #undef XCHAL_HAVE_DFP_SQRT
388 #define XCHAL_HAVE_DFP_SQRT (xtensa_get_config_v1 ()->xchal_have_dfp_sqrt)
389
390 #undef XCHAL_HAVE_DFP_RSQRT
391 #define XCHAL_HAVE_DFP_RSQRT (xtensa_get_config_v1 ()->xchal_have_dfp_rsqrt)
392
393 #undef XCHAL_HAVE_WINDOWED
394 #define XCHAL_HAVE_WINDOWED (xtensa_get_config_v1 ()->xchal_have_windowed)
395
396 #undef XCHAL_NUM_AREGS
397 #define XCHAL_NUM_AREGS (xtensa_get_config_v1 ()->xchal_num_aregs)
398
399 #undef XCHAL_HAVE_WIDE_BRANCHES
400 #define XCHAL_HAVE_WIDE_BRANCHES (xtensa_get_config_v1 ()->xchal_have_wide_branches)
401
402 #undef XCHAL_HAVE_PREDICTED_BRANCHES
403 #define XCHAL_HAVE_PREDICTED_BRANCHES (xtensa_get_config_v1 ()->xchal_have_predicted_branches)
404
405
406 #undef XCHAL_ICACHE_SIZE
407 #define XCHAL_ICACHE_SIZE (xtensa_get_config_v1 ()->xchal_icache_size)
408
409 #undef XCHAL_DCACHE_SIZE
410 #define XCHAL_DCACHE_SIZE (xtensa_get_config_v1 ()->xchal_dcache_size)
411
412 #undef XCHAL_ICACHE_LINESIZE
413 #define XCHAL_ICACHE_LINESIZE (xtensa_get_config_v1 ()->xchal_icache_linesize)
414
415 #undef XCHAL_DCACHE_LINESIZE
416 #define XCHAL_DCACHE_LINESIZE (xtensa_get_config_v1 ()->xchal_dcache_linesize)
417
418 #undef XCHAL_ICACHE_LINEWIDTH
419 #define XCHAL_ICACHE_LINEWIDTH (xtensa_get_config_v1 ()->xchal_icache_linewidth)
420
421 #undef XCHAL_DCACHE_LINEWIDTH
422 #define XCHAL_DCACHE_LINEWIDTH (xtensa_get_config_v1 ()->xchal_dcache_linewidth)
423
424 #undef XCHAL_DCACHE_IS_WRITEBACK
425 #define XCHAL_DCACHE_IS_WRITEBACK (xtensa_get_config_v1 ()->xchal_dcache_is_writeback)
426
427
428 #undef XCHAL_HAVE_MMU
429 #define XCHAL_HAVE_MMU (xtensa_get_config_v1 ()->xchal_have_mmu)
430
431 #undef XCHAL_MMU_MIN_PTE_PAGE_SIZE
432 #define XCHAL_MMU_MIN_PTE_PAGE_SIZE (xtensa_get_config_v1 ()->xchal_mmu_min_pte_page_size)
433
434
435 #undef XCHAL_HAVE_DEBUG
436 #define XCHAL_HAVE_DEBUG (xtensa_get_config_v1 ()->xchal_have_debug)
437
438 #undef XCHAL_NUM_IBREAK
439 #define XCHAL_NUM_IBREAK (xtensa_get_config_v1 ()->xchal_num_ibreak)
440
441 #undef XCHAL_NUM_DBREAK
442 #define XCHAL_NUM_DBREAK (xtensa_get_config_v1 ()->xchal_num_dbreak)
443
444 #undef XCHAL_DEBUGLEVEL
445 #define XCHAL_DEBUGLEVEL (xtensa_get_config_v1 ()->xchal_debuglevel)
446
447
448 #undef XCHAL_MAX_INSTRUCTION_SIZE
449 #define XCHAL_MAX_INSTRUCTION_SIZE (xtensa_get_config_v1 ()->xchal_max_instruction_size)
450
451 #undef XCHAL_INST_FETCH_WIDTH
452 #define XCHAL_INST_FETCH_WIDTH (xtensa_get_config_v1 ()->xchal_inst_fetch_width)
453
454
455 #undef XSHAL_ABI
456 #undef XTHAL_ABI_WINDOWED
457 #undef XTHAL_ABI_CALL0
458 #define XSHAL_ABI (xtensa_get_config_v1 ()->xshal_abi)
459 #define XTHAL_ABI_WINDOWED (xtensa_get_config_v1 ()->xthal_abi_windowed)
460 #define XTHAL_ABI_CALL0 (xtensa_get_config_v1 ()->xthal_abi_call0)
461
462
463 #undef XCHAL_M_STAGE
464 #define XCHAL_M_STAGE (xtensa_get_config_v2 ()->xchal_m_stage)
465
466 #undef XTENSA_MARCH_LATEST
467 #define XTENSA_MARCH_LATEST (xtensa_get_config_v2 ()->xtensa_march_latest)
468
469 #undef XTENSA_MARCH_EARLIEST
470 #define XTENSA_MARCH_EARLIEST (xtensa_get_config_v2 ()->xtensa_march_earliest)
471
472
473 #undef XCHAL_HAVE_CLAMPS
474 #define XCHAL_HAVE_CLAMPS (xtensa_get_config_v3 ()->xchal_have_clamps)
475
476 #undef XCHAL_HAVE_DEPBITS
477 #define XCHAL_HAVE_DEPBITS (xtensa_get_config_v3 ()->xchal_have_depbits)
478
479 #undef XCHAL_HAVE_EXCLUSIVE
480 #define XCHAL_HAVE_EXCLUSIVE (xtensa_get_config_v3 ()->xchal_have_exclusive)
481
482 #undef XCHAL_HAVE_XEA3
483 #define XCHAL_HAVE_XEA3 (xtensa_get_config_v3 ()->xchal_have_xea3)
484
485 #endif /* XTENSA_CONFIG_DEFINITION */
486
487 #ifdef __cplusplus
488 }
489 #endif
490 #endif /* !XTENSA_DYNCONFIG_H */