1  /* Verify that the rte delay slot is not stuffed with register pop insns
       2     which touch the banked registers r0..r7 on SH3* and SH4* targets.  */
       3  /* { dg-do compile { target { banked_r0r7_isr } } }  */
       4  /* { dg-options "-O1" } */
       5  /* { dg-final { scan-assembler-times "nop" 1 } } */
       6  
       7  int __attribute__ ((interrupt_handler))
       8  test00 (int a, int b, int c, int d)
       9  {
      10    return a + b;
      11  }