1  /* Check that the negc instruction is generated as expected for the cases
       2     below.  If we see a movrt or #-1 negc sequence it means that the pattern
       3     which handles the inverted case does not work properly.  */
       4  /* { dg-do compile }  */
       5  /* { dg-options "-O1" } */
       6  
       7  /* { dg-final { scan-assembler-times "negc" 15 { target { ! sh2a } } } } */
       8  /* { dg-final { scan-assembler-times "addc" 3 { target { ! sh2a } } } } */
       9  
      10  /* { dg-final { scan-assembler-times "negc" 13 { target { sh2a } } } } */
      11  /* { dg-final { scan-assembler-times "addc" 5 { target { sh2a } } } } */
      12  /* { dg-final { scan-assembler-times "bld" 2 { target { sh2a } } } } */
      13  
      14  /* { dg-final { scan-assembler-not "movrt|#-1|add\t|sub\t|movt" } } */
      15  
      16  int
      17  test00 (int a, int b, int* x)
      18  {
      19    return (a == b) ? 0x7FFFFFFF : 0x80000000;
      20  }
      21  
      22  int
      23  test00_inv (int a, int b)
      24  {
      25    return (a != b) ? 0x80000000 : 0x7FFFFFFF;
      26  }
      27  
      28  int
      29  test01 (int a, int b)
      30  {
      31    return (a >= b) ? 0x7FFFFFFF : 0x80000000;
      32  }
      33  
      34  int
      35  test01_inv (int a, int b)
      36  {
      37    return (a < b) ? 0x80000000 : 0x7FFFFFFF;
      38  }
      39  
      40  int
      41  test02 (int a, int b)
      42  {
      43    return (a > b) ? 0x7FFFFFFF : 0x80000000;
      44  }
      45  
      46  int
      47  test02_inv (int a, int b)
      48  {
      49    return (a <= b) ? 0x80000000 : 0x7FFFFFFF;
      50  }
      51  
      52  int
      53  test03 (int a, int b)
      54  {
      55    return ((a & b) == 0) ? 0x7FFFFFFF : 0x80000000;
      56  }
      57  
      58  int
      59  test03_inv (int a, int b)
      60  {
      61    return ((a & b) != 0) ? 0x80000000 : 0x7FFFFFFF;
      62  }
      63  
      64  int
      65  test04 (int a)
      66  {
      67    return ((a & 0x55) == 0) ? 0x7FFFFFFF : 0x80000000;
      68  }
      69  
      70  int
      71  test04_inv (int a)
      72  {
      73    return ((a & 0x55) != 0) ? 0x80000000 : 0x7FFFFFFF;
      74  }
      75  
      76  int
      77  test05 (int a, int b)
      78  {
      79    /* 1x addc  */
      80    return a != b ? 0x7FFFFFFF : 0x80000000;
      81  }
      82  
      83  int
      84  test06 (char a)
      85  {
      86    return ((a & 0x03) == 0) ? 0x7FFFFFFF : 0x80000000;
      87  }
      88  
      89  int
      90  test07 (char a)
      91  {
      92    return ((a & 0x80) == 0) ? 0x7FFFFFFF : 0x80000000;
      93  }
      94  
      95  int
      96  test08 (char a)
      97  {
      98    return ((a & 1) == 0) ? 0x7FFFFFFF : 0x80000000;
      99  }
     100  
     101  int
     102  test09 (int a)
     103  {
     104    /* 1x cmp/pz, 1x addc  */
     105    return a < 0 ? 0x7FFFFFFF : 0x80000000;
     106  }
     107  
     108  int
     109  test10 (int a)
     110  {
     111    /* 1x cmp/pz, 1x negc  */
     112    return a >= 0 ? 0x7FFFFFFF : 0x80000000;
     113  }
     114  
     115  int
     116  test11 (int a)
     117  {
     118    /* 1x cmp/pl, 1x negc  */
     119    return a > 0 ? 0x7FFFFFFF : 0x80000000;
     120  }
     121  
     122  int
     123  test12 (int a)
     124  {
     125    /* 1x cmp/pl, 1x addc  */
     126    return a <= 0 ? 0x7FFFFFFF : 0x80000000;
     127  }