1  /* Check that inverted conditional branch logic does not generate
       2     unnecessary explicit T bit extractions, inversions and 
       3     test instructions.  */
       4  /* { dg-do compile }  */
       5  /* { dg-options "-O1 -mbranch-cost=2" } */
       6  /* { dg-final { scan-assembler-not "movt|tst|negc|extu" } } */
       7  
       8  int
       9  testfunc_00 (int a, int b, int c, int d)
      10  {
      11    return (a != b || a != d) ? b : c;
      12  }
      13  
      14  int
      15  testfunc_01 (int a, int b, int c, int d)
      16  {
      17    return (a == b || a == d) ? b : c;
      18  }
      19  
      20  int
      21  testfunc_02 (int a, int b, int c, int d)
      22  {
      23    return (a == b && a == d) ? b : c;
      24  }
      25  
      26  int
      27  testfunc_03 (int a, int b, int c, int d)
      28  {
      29    return (a != b && a != d) ? b : c;
      30  }
      31