1  // Test use of RISBG vs RISBGN on zEC12.
       2  
       3  /* Tests ported from the Llvm testsuite. */
       4  
       5  /* { dg-do compile { target s390x-*-* } } */
       6  /* { dg-options "-O3 -march=zEC12 -mzarch -fno-asynchronous-unwind-tables" } */
       7  
       8  #define i64 signed long long
       9  #define ui64 unsigned long long
      10  
      11  // On zEC12, we generally prefer RISBGN.
      12  i64 f1 (i64 v_a, i64 v_b)
      13  {
      14  /* { dg-final { scan-assembler "f1:\n\trisbgn\t%r2,%r3,60,62,0" { target { lp64 } } } } */
      15  /* { dg-final { scan-assembler "f1:\n\trisbgn\t%r3,%r2,0,0\\\+32-1,64-0-32\n\trisbgn\t%r3,%r5,60,62,0\n" { target { ! lp64 } } } } */
      16    i64 v_anda = v_a & -15;
      17    i64 v_andb = v_b & 14;
      18    i64 v_or = v_anda | v_andb;
      19    return v_or;
      20  }
      21  
      22  // But we may fall back to RISBG if we can use the condition code.
      23  extern i64 f2_foo();
      24  i64 f2 (i64 v_a, i64 v_b)
      25  {
      26  /* { dg-final { scan-assembler "f2:\n\trisbg\t%r2,%r3,60,62,0\n\tbner\t%r14\n\tjg\tf2_foo.*\n" { target { lp64 } } } } */
      27  /* { dg-final { scan-assembler "f2:\n\trisbgn\t%r3,%r2,0,0\\\+32-1,64-0-32\n\trisbg\t%r3,%r5,60,62,0" { target { ! lp64 } } } } */
      28    i64 v_anda = v_a & -15;
      29    i64 v_andb = v_b & 14;
      30    i64 v_or = v_anda | v_andb;
      31    if (! v_or)
      32      return f2_foo();
      33    else
      34      return v_or;
      35  }
      36  
      37  void f2_bar ();
      38  void f2_cconly (i64 v_a, i64 v_b)
      39  {
      40  /* { dg-final { scan-assembler "f2_cconly:\n\trisbg\t%r2,%r3,60,62,0\n\tber\t%r14\n\tjg\tf2_bar(@PLT)?\n" { target { lp64 } } } } */
      41  /* { dg-final { scan-assembler "f2_cconly:\n\trisbgn\t%r3,%r2,0,0\\\+32-1,64-0-32\n\trisbg\t%r3,%r5,60,62,0\n\tber\t%r14\n\tjg\tf2_bar(@PLT)?\n" { target { ! lp64 } } } } */
      42    if ((v_a & -15) | (v_b & 14))
      43      f2_bar();
      44  }