1  /* { dg-do run } */
       2  /* { dg-options "-O3 -march=z13 -mzarch --save-temps" } */
       3  
       4  #include <stddef.h>
       5  #include <limits.h>
       6  
       7  int __attribute__((noinline,noclone))
       8  sadd (int a, int b, int *res)
       9  {
      10     return __builtin_sadd_overflow(a, b, res);
      11  }
      12  
      13  int __attribute__((noinline,noclone))
      14  ssub (int a, int b, int *res)
      15  {
      16     return __builtin_ssub_overflow(a, b, res);
      17  }
      18  
      19  
      20  int __attribute__((noinline,noclone))
      21  saddl (long a, long b, long *res)
      22  {
      23     return __builtin_saddl_overflow(a, b, res);
      24  }
      25  
      26  int __attribute__((noinline,noclone))
      27  ssubl (long a, long b, long *res)
      28  {
      29     return __builtin_ssubl_overflow(a, b, res);
      30  }
      31  
      32  
      33  int __attribute__((noinline,noclone))
      34  saddll (long long a, long long b, long long *res)
      35  {
      36     return __builtin_saddll_overflow(a, b, res);
      37  }
      38  
      39  int __attribute__((noinline,noclone))
      40  ssubll (long long a, long long b, long long *res)
      41  {
      42     return __builtin_ssubll_overflow(a, b, res);
      43  }
      44  
      45  
      46  /* With the attribute at least main always uses the same instructions
      47     regardless of the -march setting.  This is necessary for the
      48     scan-assembler-times directive below.  */
      49  int __attribute__ ((target("arch=z10")))
      50  main ()
      51  {
      52    int ret = 0;
      53    int result;
      54    long lresult;
      55    long long llresult;
      56  
      57    ret += !!sadd (INT_MAX, 1, &result);
      58    ret += !!ssub (INT_MIN, 1, &result);
      59    ret += !!saddl (LONG_MAX, 1, &lresult);
      60    ret += !!ssubl (LONG_MIN, 1, &lresult);
      61    ret += !!saddll (LLONG_MAX, 1, &llresult);
      62    ret += !!ssubll (LLONG_MIN, 1, &llresult);
      63  
      64    if (ret != 6)
      65      __builtin_abort ();
      66  
      67    return 0;
      68  }
      69  
      70  /* Check that no compare or bitop instructions are emitted.  */
      71  /* { dg-final { scan-assembler-not "\tcr" } } */
      72  /* { dg-final { scan-assembler-not "\txr" } } */
      73  /* { dg-final { scan-assembler-not "\tnr" } } */
      74  /* { dg-final { scan-assembler-not "\tcgr" } } */
      75  /* { dg-final { scan-assembler-not "\txgr" } } */
      76  /* { dg-final { scan-assembler-not "\tngr" } } */
      77  /* On 31 bit the long long variants use risbgn to merge the 32 bit
      78     regs into a 64 bit reg.  */
      79  /* { dg-final { scan-assembler-not "\trisbg" { target { lp64 } } } } */
      80  /* Just one for the ret != 6 comparison.  */
      81  /* { dg-final { scan-assembler-times "ci" 1 } } */
      82  /* { dg-final { scan-assembler-times "\tlochio\t" 6 { target { ! lp64 } } } } */
      83  /* { dg-final { scan-assembler-times "\tlocghio\t" 6 { target lp64 } } } */