1  /* { dg-options "-march=rv32imc -mabi=ilp32" } */
       2  /* { dg-skip-if "" { *-*-* } { "*" } { "-Os" } } */
       3  
       4  /* These loads cannot be compressed because only one compressed reg is
       5     available (since args are passed in a0-a4, that leaves a5-a7 available, of
       6     which only a5 is a compressed reg). Therefore the shorten_memrefs pass should
       7     not attempt to rewrite these loads into a compressible format. It may not
       8     be possible to avoid this because shorten_memrefs happens before reg alloc.
       9  */
      10  
      11  extern int sub1 (int, int, int, int, int, int, int);
      12  
      13  int
      14  load1a (int a0, int a1, int a2, int a3, int a4, int *array)
      15  {
      16    int a = 0;
      17    a += array[200];
      18    a += array[201];
      19    a += array[202];
      20    a += array[203];
      21    return sub1 (a0, a1, a2, a3, a4, 0, a);
      22  }
      23  
      24  extern long long sub2 (long long, long long, long long, long long, long long,
      25             long long, long long);
      26  
      27  long long
      28  load2a (long long a0, long long a1, long long a2, long long a3, long long a4,
      29    long long *array)
      30  {
      31    int a = 0;
      32    a += array[200];
      33    a += array[201];
      34    a += array[202];
      35    a += array[203];
      36    return sub2 (a0, a1, a2, a3, a4, 0, a);
      37  }
      38  
      39  /* { dg-final { scan-assembler-not "load1a:\n(\t?\\.\[^\n\]*\n)*\taddi" { xfail riscv*-*-* } } } */
      40  /* { dg-final { scan-assembler-not "load2a:\n.*addi\[ \t\]*\[at\]\[0-9\],\[at\]\[0-9\],\[0-9\]*" { xfail riscv*-*-*  } } } */