1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void foo(int32_t *in1, int32_t *in2, int32_t *in3, int32_t *out, size_t n) {
       7    for (size_t i = 0; i < n; i += 1) {
       8      vint32m1_t a = __riscv_vle32_v_i32m1(in1, __riscv_vsetvlmax_e16mf2());
       9      __riscv_vse32_v_i32m1(out, a, __riscv_vsetvlmax_e16mf2());
      10    }
      11    
      12    for (size_t i = 0; i < n; i += 1) {
      13      vint32m1_t a = __riscv_vle32_v_i32m1(in1 + 100, __riscv_vsetvlmax_e16mf2());
      14      vint32m1_t b = __riscv_vle32_v_i32m1_tu(a, in2 + 100, __riscv_vsetvlmax_e16mf2());
      15      vint32m1_t c = __riscv_vle32_v_i32m1_tu(b, in3 + 100, __riscv_vsetvlmax_e16mf2());
      16      __riscv_vse32_v_i32m1(out + 100, c, __riscv_vsetvlmax_e16mf2());
      17    }
      18  }
      19  
      20  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m1,\s*tu,\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      21  /* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */