1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f1 (void * restrict in, void * restrict out)
       7  {
       8    vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 1);
       9    vint8mf8_t v2;
      10    *(vfloat32mf2_t*)(out + 1) = v1;
      11    *(vint8mf8_t*)(out + 2) = v2;
      12  }
      13  
      14  void f2 (void * restrict in, void * restrict out)
      15  {
      16    vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 1);
      17    vint16mf4_t v2;
      18    *(vfloat32mf2_t*)(out + 1) = v1;
      19    *(vint16mf4_t*)(out + 2) = v2;
      20  }
      21  
      22  void f3 (void * restrict in, void * restrict out)
      23  {
      24    vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 1);
      25    vint64m1_t v2;
      26    *(vfloat32mf2_t*)(out + 1) = v1;
      27    *(vint64m1_t*)(out + 2) = v2;
      28  }
      29  
      30  void f4 (void * restrict in, void * restrict out)
      31  {
      32    vfloat32mf2_t v1 = *(vfloat32mf2_t*)(in + 1);
      33    vfloat64m1_t v2;
      34    *(vfloat32mf2_t*)(out + 1) = v1;
      35    *(vfloat64m1_t*)(out + 2) = v2;
      36  }
      37  
      38  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */
      39  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */
      40  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" } } } } */
      41  
      42  /* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" } } } } */