1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f1 (void * restrict in, void * restrict out)
       7  {
       8    vint16mf4_t v1 = *(vint16mf4_t*)(in + 1);
       9    vfloat32mf2_t v2;
      10    *(vint16mf4_t*)(out + 1) = v1;
      11    *(vfloat32mf2_t*)(out + 2) = v2;
      12  }
      13  
      14  void f2 (void * restrict in, void * restrict out)
      15  {
      16    vint16mf4_t v1 = *(vint16mf4_t*)(in + 1);
      17    vfloat64m1_t v2;
      18    *(vint16mf4_t*)(out + 1) = v1;
      19    *(vfloat64m1_t*)(out + 2) = v2;
      20  }
      21  
      22  void f3 (void * restrict in, void * restrict out)
      23  {
      24    vint16mf2_t v1 = *(vint16mf2_t*)(in + 1);
      25    vfloat32m1_t v2;
      26    *(vint16mf2_t*)(out + 1) = v1;
      27    *(vfloat32m1_t*)(out + 2) = v2;
      28  }
      29  
      30  void f4 (void * restrict in, void * restrict out)
      31  {
      32    vint16mf2_t v1 = *(vint16mf2_t*)(in + 1);
      33    vfloat64m2_t v2;
      34    *(vint16mf2_t*)(out + 1) = v1;
      35    *(vfloat64m2_t*)(out + 2) = v2;
      36  }
      37  
      38  void f5 (void * restrict in, void * restrict out)
      39  {
      40    vint16m1_t v1 = *(vint16m1_t*)(in + 1);
      41    vfloat32m2_t v2;
      42    *(vint16m1_t*)(out + 1) = v1;
      43    *(vfloat32m2_t*)(out + 2) = v2;
      44  }
      45  
      46  void f6 (void * restrict in, void * restrict out)
      47  {
      48    vint16m1_t v1 = *(vint16m1_t*)(in + 1);
      49    vfloat64m4_t v2;
      50    *(vint16m1_t*)(out + 1) = v1;
      51    *(vfloat64m4_t*)(out + 2) = v2;
      52  }
      53  
      54  void f7 (void * restrict in, void * restrict out)
      55  {
      56    vint16m2_t v1 = *(vint16m2_t*)(in + 1);
      57    vfloat32m4_t v2;
      58    *(vint16m2_t*)(out + 1) = v1;
      59    *(vfloat32m4_t*)(out + 2) = v2;
      60  }
      61  
      62  void f8 (void * restrict in, void * restrict out)
      63  {
      64    vint16m2_t v1 = *(vint16m2_t*)(in + 1);
      65    vfloat64m8_t v2;
      66    *(vint16m2_t*)(out + 1) = v1;
      67    *(vfloat64m8_t*)(out + 2) = v2;
      68  }
      69  
      70  void f9 (void * restrict in, void * restrict out)
      71  {
      72    vint16m4_t v1 = *(vint16m4_t*)(in + 1);
      73    vfloat32m8_t v2;
      74    *(vint16m4_t*)(out + 1) = v1;
      75    *(vfloat32m8_t*)(out + 2) = v2;
      76  }
      77  
      78  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */
      79  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */
      80  
      81  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */
      82  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */
      83  
      84  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */
      85  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */
      86  
      87  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" } } } } */
      88  
      89  /* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0" } } } } */