1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  /* The for loop body should not have vsetvl instruction.  */
       7  void f (void * restrict in, void * restrict out, int n, int cond)
       8  {
       9    switch (cond)
      10    {
      11    case 1:{
      12      vint8mf8_t v = *(vint8mf8_t*)(in + 100);
      13      *(vint8mf8_t*)(out + 100) = v;
      14      break;
      15    }
      16    case 2:{
      17      vint8mf8_t v = *(vint8mf8_t*)(in + 200);
      18      *(vint8mf8_t*)(out + 100) = v;
      19      break;
      20    }
      21    case 3:{
      22      vint8mf8_t v = *(vint8mf8_t*)(in + 300);
      23      *(vint8mf8_t*)(out + 100) = v;
      24      break;
      25    }
      26    default:{
      27      break;
      28    }
      29    }
      30    for (int i = 0; i < n; i++)
      31      {
      32        vint8mf8_t v = *(vint8mf8_t*)(in + i);
      33        *(vint8mf8_t*)(out + i) = v;
      34      }
      35  }
      36  
      37  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0"   no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      38  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0"   no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */