1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t cond, size_t cond2)
       7  {
       8    for (size_t i = 0; i < n; i++)
       9      {
      10        if (i != cond) {
      11          vbool1_t v = *(vbool1_t*)(in + i + 400);
      12          *(vbool1_t*)(out + i + 400) = v;
      13        } else if (i == cond2) {
      14          vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i + 200);
      15          *(vfloat32mf2_t*)(out + i + 200) = v;
      16        } else {
      17          vint8mf8_t v = *(vint8mf8_t*)(in + i + 100);
      18          *(vint8mf8_t*)(out + i + 100) = v;
      19        }
      20      }
      21  }
      22  
      23  /* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      24  /* { dg-final { scan-assembler-times {j\s+\.L[0-9]+\s+\.L[0-9]+:\s+vlm\.v} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      25  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */