1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (int32_t * in, int32_t * out, int n, int cond)
       7  {
       8    if (cond) {
       9      vint32mf2_t v = *(vint32mf2_t*) (in + 100);
      10      *(vint32mf2_t*) (out + 100) = v;
      11    } else {
      12      vint16mf2_t v = *(vint16mf2_t*) (in + 200);
      13      *(vint16mf2_t*) (out + 200) = v;
      14    }
      15    
      16    for (int i = 0; i < n; i++) {
      17      vint8mf8_t v = *(vint8mf8_t*) (in + 300 + i);
      18      *(vint8mf8_t*) (out + 300 + i) = v;
      19    }
      20  }
      21  
      22  /* { dg-final { scan-assembler-times {\.L[0-9]+:\s+vle8\.v} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      23  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      24  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      25  /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */