1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond)
       7  {
       8    for (size_t i = 0; i < n; i++)
       9      {
      10        if (i % 2) {
      11          
      12          if (cond) {
      13            vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i + 2000);
      14            *(vfloat32mf2_t*)(out + i + 2000) = v;
      15          } else {
      16            vfloat32mf2_t v = *(vfloat32mf2_t*)(in + i + 3000);
      17            *(vfloat32mf2_t*)(out + i + 3000) = v;
      18          }
      19          
      20          for (size_t j = 0; j < m; j += 1) {
      21            if (j % 2 == 0) {
      22              vint8mf8_t v = *(vint8mf8_t*)(in + i + j + 100);
      23              *(vint8mf8_t*)(out + i + j + 100) = v;
      24            } else {
      25              vint8mf8_t v = *(vint8mf8_t*)(in + i + j + 200);
      26              *(vint8mf8_t*)(out + i + j + 200) = v;
      27            }
      28          }
      29          
      30          if (cond) {
      31            vuint16mf4_t v = *(vuint16mf4_t*)(in + i + 7000);
      32            *(vuint16mf4_t*)(out + i + 7000) = v;
      33          } else {
      34            vuint16mf4_t v = *(vuint16mf4_t*)(in + i + 8000);
      35            *(vuint16mf4_t*)(out + i + 8000) = v;
      36          }
      37        } else {
      38          if (cond) {
      39            vuint16mf2_t v = *(vuint16mf2_t*)(in + i + 4000);
      40            *(vuint16mf2_t*)(out + i + 4000) = v;
      41          } else {
      42            vuint16mf2_t v = *(vuint16mf2_t*)(in + i + 5000);
      43            *(vuint16mf2_t*)(out + i + 5000) = v;
      44          }
      45          
      46          vbool1_t v = *(vbool1_t*)(in + i + 300);
      47          *(vbool1_t*)(out + i + 300) = v;
      48        }
      49      }
      50  }
      51  
      52  /* { dg-final { scan-assembler-times {vsetvli} 5 { target { no-opts "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      53  /* { dg-final { scan-assembler-not {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      54  /* { dg-final { scan-assembler {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      55  /* { dg-final { scan-assembler {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      56  /* { dg-final { scan-assembler {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */