1 /* { dg-do compile } */
2 /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
3
4 #include "riscv_vector.h"
5
6 void f (int * restrict in, int * restrict out, int n, int cond)
7 {
8 if (cond == 1)
9 {
10 vuint8mf8_t v = *(vuint8mf8_t*)(in + 100);
11 *(vuint8mf8_t*)(out + 100) = v;
12 }
13 else
14 {
15 if (cond == 2)
16 {
17 vuint8mf8_t v = *(vuint8mf8_t*)(in + 200);
18 *(vuint8mf8_t*)(out + 200) = v;
19 out[1000] = 8000;
20 }
21 }
22 for (int i = 0; i < n; i++)
23 {
24 vuint8mf8_t v = *(vuint8mf8_t*)(in + i);
25 *(vuint8mf8_t*)(out + i) = v;
26 }
27 }
28
29 void f2 (int * restrict in, int * restrict out, int n, int cond)
30 {
31 if (cond == 1)
32 {
33 vuint8mf4_t v = *(vuint8mf4_t*)(in + 100);
34 *(vuint8mf4_t*)(out + 100) = v;
35 }
36 else
37 {
38 if (cond == 2)
39 {
40 vuint8mf4_t v = *(vuint8mf4_t*)(in + 200);
41 *(vuint8mf4_t*)(out + 200) = v;
42 out[1000] = 8000;
43 }
44 }
45 for (int i = 0; i < n; i++)
46 {
47 vuint8mf4_t v = *(vuint8mf4_t*)(in + i);
48 *(vuint8mf4_t*)(out + i) = v;
49 }
50 }
51
52 void f3 (int * restrict in, int * restrict out, int n, int cond)
53 {
54 if (cond == 1)
55 {
56 vuint8mf2_t v = *(vuint8mf2_t*)(in + 100);
57 *(vuint8mf2_t*)(out + 100) = v;
58 }
59 else
60 {
61 if (cond == 2)
62 {
63 vuint8mf2_t v = *(vuint8mf2_t*)(in + 200);
64 *(vuint8mf2_t*)(out + 200) = v;
65 out[1000] = 8000;
66 }
67 }
68 for (int i = 0; i < n; i++)
69 {
70 vuint8mf2_t v = *(vuint8mf2_t*)(in + i);
71 *(vuint8mf2_t*)(out + i) = v;
72 }
73 }
74
75 void f4 (int * restrict in, int * restrict out, int n, int cond)
76 {
77 if (cond == 1)
78 {
79 vuint16mf4_t v = *(vuint16mf4_t*)(in + 100);
80 *(vuint16mf4_t*)(out + 100) = v;
81 }
82 else
83 {
84 if (cond == 2)
85 {
86 vuint16mf4_t v = *(vuint16mf4_t*)(in + 200);
87 *(vuint16mf4_t*)(out + 200) = v;
88 out[1000] = 8000;
89 }
90 }
91 for (int i = 0; i < n; i++)
92 {
93 vuint16mf4_t v = *(vuint16mf4_t*)(in + i);
94 *(vuint16mf4_t*)(out + i) = v;
95 }
96 }
97
98 void f5 (int * restrict in, int * restrict out, int n, int cond)
99 {
100 if (cond == 1)
101 {
102 vuint16mf2_t v = *(vuint16mf2_t*)(in + 100);
103 *(vuint16mf2_t*)(out + 100) = v;
104 }
105 else
106 {
107 if (cond == 2)
108 {
109 vuint16mf2_t v = *(vuint16mf2_t*)(in + 200);
110 *(vuint16mf2_t*)(out + 200) = v;
111 out[1000] = 8000;
112 }
113 }
114 for (int i = 0; i < n; i++)
115 {
116 vuint16mf2_t v = *(vuint16mf2_t*)(in + i);
117 *(vuint16mf2_t*)(out + i) = v;
118 }
119 }
120
121 void f6 (int * restrict in, int * restrict out, int n, int cond)
122 {
123 if (cond == 1)
124 {
125 vuint32mf2_t v = *(vuint32mf2_t*)(in + 100);
126 *(vuint32mf2_t*)(out + 100) = v;
127 }
128 else
129 {
130 if (cond == 2)
131 {
132 vuint32mf2_t v = *(vuint32mf2_t*)(in + 200);
133 *(vuint32mf2_t*)(out + 200) = v;
134 out[1000] = 8000;
135 }
136 }
137 for (int i = 0; i < n; i++)
138 {
139 vuint32mf2_t v = *(vuint32mf2_t*)(in + i);
140 *(vuint32mf2_t*)(out + i) = v;
141 }
142 }
143
144 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
145 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
146 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
147 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
148 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
149 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
150 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]\s+\.L[0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
151 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
152 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
153 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
154 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
155 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]\s+\.L[0-9][0-9]\:} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */