1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void foo5_6 (int32_t * restrict in, int32_t * restrict out, size_t n, size_t m, int cond)
       7  {
       8    for (size_t i = 0; i < n; i++)
       9      {
      10        if (i % 2) {
      11          for (size_t j = 0; j < m; j += 1) {
      12            if (i % 16 == 0) {
      13            vint8mf8_t v = *(vint8mf8_t*)(in + i + 100 + j);
      14            *(vint8mf8_t*)(out + i + 100 + j) = v;
      15          } else if (i % 8 == 0) {
      16            vint16mf4_t v = *(vint16mf4_t*)(in + i + 200 + j);
      17            *(vint16mf4_t*)(out + i + 200 + j) = v;
      18          } else if (i % 4 == 0) {
      19            vint32mf2_t v = *(vint32mf2_t*)(in + i + 300 + j);
      20            *(vint32mf2_t*)(out + i + 300 + j) = v;
      21          } else {
      22            vbool64_t v = *(vbool64_t*)(in + i + 400 + j);
      23            *(vbool64_t*)(out + i + 400 + j) = v;
      24          }
      25          }
      26        } else {
      27        }
      28      }
      29  }
      30  
      31  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      32  /* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */