(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
riscv/
rvv/
vsetvl/
vlmax_back_prop-30.c
       1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (void * restrict in, void * restrict out, void * restrict in2, void * restrict out2,  int n, int cond)
       7  {
       8    for (int i = 0; i < n; i++)
       9      {
      10        vfloat32mf2_t v2 = *(vfloat32mf2_t*)(in + i + 1000);
      11        *(vfloat32mf2_t*)(out + i + 1000) = v2;
      12        vbool32_t v4;
      13        *(vbool32_t*)(out + i + 3000) = v4;
      14        vbool16_t v5;
      15        *(vbool16_t*)(out + i + 4000) = v5;
      16        vbool8_t v6;
      17        *(vbool8_t*)(out + i + 5000) = v6;
      18        vbool4_t v7;
      19        *(vbool4_t*)(out + i + 6000) = v7;
      20        vbool2_t v8;
      21        *(vbool2_t*)(out + i + 7000) = v8;
      22        vbool1_t v9;
      23        *(vbool1_t*)(out + i + 8000) = v9;
      24        vuint32mf2_t v10 = *(vuint32mf2_t*)(in + i + 100000);
      25        *(vuint32mf2_t*)(out + i + 100000) = v10;
      26      }
      27    
      28    for (int i = 0; i < n; i++) 
      29      {
      30        vint8mf8_t v1;
      31        *(vint8mf8_t*)(out + i + 10) = v1;
      32      }
      33  }
      34  
      35  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      36  /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      37  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      38  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      39  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      40  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      41  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      42  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      43  
      44  /* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */