1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (int32_t * restrict in, int32_t * restrict out, int n, int cond, int cond2, int cond3)
       7  {
       8    for (int i = 0; i < n; i++) {
       9      vint8mf8_t v = *(vint8mf8_t*)(in + i);
      10      *(vint8mf8_t*)(out + i + 200) = v;
      11    }
      12    for (int i = 0; i < n; i++) {
      13      vint32mf2_t v = *(vint32mf2_t*)(in + 200 + i);
      14      *(vint32mf2_t*)(out + i + 400) = v;
      15    }
      16    for (int i = 0; i < n; i++) {
      17      vint64m1_t v = *(vint64m1_t*)(in + 300 + i);
      18      *(vint64m1_t*)(out + i + 400) = v;
      19    }
      20    for (int i = 0; i < n; i++) {
      21      vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400 + i);
      22      *(vfloat32mf2_t*)(out + i + 500) = v;
      23    }
      24    for (int i = 0; i < n; i++) {
      25      vfloat64m1_t v = *(vfloat64m1_t*)(in + 500 + i);
      26      *(vfloat64m1_t*)(out + i + 600) = v;
      27    }
      28  
      29    if (cond == 0)
      30    {
      31      if (cond2 == 11)
      32      {
      33        for (int i = 0; i < n; i++)
      34        {
      35          out[i] = out[i] + 2;
      36        }
      37      }
      38      else if (cond2 == 111)
      39      {
      40        if (cond3 == 300)
      41        {
      42          for (int i = 0; i < n; i++)
      43          {
      44            out[i] = out[i] + out[i];
      45          }
      46        } else {
      47          for (int i = 0; i < n; i++) {
      48            vint8mf2_t v = *(vint8mf2_t*)(in + 2000 + i);
      49            *(vint8mf2_t*)(out + i + 4000) = v;
      50          }
      51        }
      52      }
      53    }
      54  
      55    for (int i = 0; i < n; i++) {
      56      vint16mf4_t v;
      57      *(vint16mf4_t*)(out + i + 700) = v;
      58    }
      59  }
      60  
      61  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
      62  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
      63  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */
      64  /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */