1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  
       7  void f (int32_t * restrict in, int32_t * restrict out, int n, int cond, int cond2, int cond3)
       8  {
       9    for (int i = 0; i < n; i++) {
      10      vint8mf8_t v = *(vint8mf8_t*)in;
      11      *(vint8mf8_t*)(out + i + 200) = v;
      12    }
      13    for (int i = 0; i < n; i++) {
      14      vint32mf2_t v = *(vint32mf2_t*)(in + 200);
      15      *(vint32mf2_t*)(out + i + 400) = v;
      16    }
      17    for (int i = 0; i < n; i++) {
      18      vint64m1_t v = *(vint64m1_t*)(in + 300);
      19      *(vint64m1_t*)(out + i + 400) = v;
      20    }
      21    for (int i = 0; i < n; i++) {
      22      vfloat32mf2_t v = *(vfloat32mf2_t*)(in + 400);
      23      *(vfloat32mf2_t*)(out + i + 500) = v;
      24    }
      25    for (int i = 0; i < n; i++) {
      26      vfloat64m1_t v = *(vfloat64m1_t*)(in + 500);
      27      *(vfloat64m1_t*)(out + i + 600) = v;
      28    }
      29  
      30    if (cond == 0)
      31    {
      32      if (cond2 == 11)
      33      {
      34        for (int i = 0; i < n; i++)
      35        {
      36          out[i] = out[i] + 2;
      37        }
      38      }
      39      else if (cond2 == 111)
      40      {
      41        if (cond3 == 300)
      42        {
      43          for (int i = 0; i < n; i++)
      44          {
      45            out[i] = out[i] + out[i];
      46          }
      47        }
      48      }
      49    }
      50  
      51    for (int i = 0; i < n; i++) {
      52      vint16mf4_t v;
      53      *(vint16mf4_t*)(out + i + 700) = v;
      54    }
      55  }
      56  
      57  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      58  /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
      59  /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */