1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (void * restrict in, void * restrict out, int n)
       7  {
       8    vfloat32mf2_t v = __riscv_vle32_v_f32mf2 (in + 10000, 19);
       9    __riscv_vse32_v_f32mf2 (out + 10000, v, 19);
      10    for (int i = 0; i < n; i++)
      11      {
      12        vint16mf2_t v1 = __riscv_vle16_v_i16mf2 (in + i + 1, 19);
      13        __riscv_vse16_v_i16mf2 (out + i + 1, v1, 19);
      14        asm volatile ("":::"memory");
      15        vint32mf2_t v2 = __riscv_vle32_v_i32mf2 (in + i + 2, 19);
      16        __riscv_vse32_v_i32mf2 (out + i + 2, v2, 19);
      17      }
      18  }
      19  
      20  /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*19,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      21  /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*19,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      22