(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
riscv/
rvv/
vsetvl/
imm_loop_invariant-7.c
       1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (void * restrict in, void * restrict out, int l, int n, int m)
       7  {
       8    for (int i = 0; i < l; i++){
       9      for (int j = 0; j < m; j++){
      10        for (int k = 0; k < n; k++)
      11          {
      12            vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + i + j, 17);
      13            __riscv_vse8_v_i8mf8 (out + i + j, v, 17);
      14            vint8mf8_t v2 = __riscv_vle8_v_i8mf8_tu (v, in + i + j + 16, 17);
      15            __riscv_vse8_v_i8mf8 (out + i + j + 16, v2, 17);
      16          }
      17      }
      18    }
      19  }
      20  
      21  void f2 (void * restrict in, void * restrict out, int l, int n, int m)
      22  {
      23    for (int i = 0; i < l; i++){
      24      for (int j = 0; j < m; j++){
      25        for (int k = 0; k < n; k++)
      26          {
      27            vfloat64m8_t v = __riscv_vle64_v_f64m8 (in + i + j, 17);
      28            __riscv_vse64_v_f64m8 (out + i + j, v, 17);
      29            vfloat64m8_t v2 = __riscv_vle64_v_f64m8_tu (v, in + i + j + 16, 17);
      30            __riscv_vse64_v_f64m8 (out + i + j + 16, v2, 17);
      31          }
      32      }
      33    }
      34  }
      35  
      36  /* { dg-final { scan-assembler-times {\.L[0-9]+\:\s+vle8\.v\s+v[0-9]+,\s*0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      37  /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*17,\s*e8,\s*mf8,\s*tu,\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      38  /* { dg-final { scan-assembler-times {\.L[0-9]+\:\s+vle64\.v\s+v[0-9]+,\s*0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      39  /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*17,\s*e64,\s*m8,\s*tu,\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */