1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f5 (void * restrict in, void * restrict out, int l, int n, int m)
       7  {
       8    for (int i = 0; i < l; i++){
       9      for (int j = 0; j < m; j++){
      10        for (int k = 0; k < n; k++)
      11          {
      12            vint32mf2_t v = __riscv_vle32_v_i32mf2 (in + i + j, 17);
      13            __riscv_vse32_v_i32mf2 (out + i + j, v, 17);
      14          }
      15      }
      16    }
      17  }
      18  
      19  void f6 (void * restrict in, void * restrict out, int l, int n, int m)
      20  {
      21    for (int i = 0; i < l; i++){
      22      for (int j = 0; j < m; j++){
      23        for (int k = 0; k < n; k++)
      24          {
      25            vuint32mf2_t v = __riscv_vle32_v_u32mf2 (in + i + j, 17);
      26            __riscv_vse32_v_u32mf2 (out + i + j, v, 17);
      27          }
      28      }
      29    }
      30  }
      31  
      32  void f7 (void * restrict in, void * restrict out, int l, int n, int m)
      33  {
      34    for (int i = 0; i < l; i++){
      35      for (int j = 0; j < m; j++){
      36        for (int k = 0; k < n; k++)
      37          {
      38            vint32m1_t v = __riscv_vle32_v_i32m1 (in + i + j, 17);
      39            __riscv_vse32_v_i32m1 (out + i + j, v, 17);
      40          }
      41      }
      42    }
      43  }
      44  
      45  void f8 (void * restrict in, void * restrict out, int l, int n, int m)
      46  {
      47    for (int i = 0; i < l; i++){
      48      for (int j = 0; j < m; j++){
      49        for (int k = 0; k < n; k++)
      50          {
      51            vuint32m1_t v = __riscv_vle32_v_u32m1 (in + i + j, 17);
      52            __riscv_vse32_v_u32m1 (out + i + j, v, 17);
      53          }
      54      }
      55    }
      56  }
      57  
      58  void f9 (void * restrict in, void * restrict out, int l, int n, int m)
      59  {
      60    for (int i = 0; i < l; i++){
      61      for (int j = 0; j < m; j++){
      62        for (int k = 0; k < n; k++)
      63          {
      64            vint32m2_t v = __riscv_vle32_v_i32m2 (in + i + j, 17);
      65            __riscv_vse32_v_i32m2 (out + i + j, v, 17);
      66          }
      67      }
      68    }
      69  }
      70  
      71  void f10 (void * restrict in, void * restrict out, int l, int n, int m)
      72  {
      73    for (int i = 0; i < l; i++){
      74      for (int j = 0; j < m; j++){
      75        for (int k = 0; k < n; k++)
      76          {
      77            vuint32m2_t v = __riscv_vle32_v_u32m2 (in + i + j, 17);
      78            __riscv_vse32_v_u32m2 (out + i + j, v, 17);
      79          }
      80      }
      81    }
      82  }
      83  
      84  void f11 (void * restrict in, void * restrict out, int l, int n, int m)
      85  {
      86    for (int i = 0; i < l; i++){
      87      for (int j = 0; j < m; j++){
      88        for (int k = 0; k < n; k++)
      89          {
      90            vint32m4_t v = __riscv_vle32_v_i32m4 (in + i + j, 17);
      91            __riscv_vse32_v_i32m4 (out + i + j, v, 17);
      92          }
      93      }
      94    }
      95  }
      96  
      97  void f12 (void * restrict in, void * restrict out, int l, int n, int m)
      98  {
      99    for (int i = 0; i < l; i++){
     100      for (int j = 0; j < m; j++){
     101        for (int k = 0; k < n; k++)
     102          {
     103            vuint32m4_t v = __riscv_vle32_v_u32m4 (in + i + j, 17);
     104            __riscv_vse32_v_u32m4 (out + i + j, v, 17);
     105          }
     106      }
     107    }
     108  }
     109  
     110  void f13 (void * restrict in, void * restrict out, int l, int n, int m)
     111  {
     112    for (int i = 0; i < l; i++){
     113      for (int j = 0; j < m; j++){
     114        for (int k = 0; k < n; k++)
     115          {
     116            vint32m8_t v = __riscv_vle32_v_i32m8 (in + i + j, 17);
     117            __riscv_vse32_v_i32m8 (out + i + j, v, 17);
     118          }
     119      }
     120    }
     121  }
     122  
     123  void f14 (void * restrict in, void * restrict out, int l, int n, int m)
     124  {
     125    for (int i = 0; i < l; i++){
     126      for (int j = 0; j < m; j++){
     127        for (int k = 0; k < n; k++)
     128          {
     129            vuint32m8_t v = __riscv_vle32_v_u32m8 (in + i + j, 17);
     130            __riscv_vse32_v_u32m8 (out + i + j, v, 17);
     131          }
     132      }
     133    }
     134  }
     135  
     136  /* { dg-final { scan-assembler-times {\.L[0-9]+\:\s+vle32\.v\s+v[0-9]+,\s*0\s*\([a-x0-9]+\)} 10 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
     137  /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*17,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
     138  /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*17,\s*e32,\s*m1,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
     139  /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*17,\s*e32,\s*m2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
     140  /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*17,\s*e32,\s*m4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
     141  /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*17,\s*e32,\s*m8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */