1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (void * restrict in, void * restrict out, int l, int n, int m)
       7  {
       8    for (int i = 0; i < l; i++){
       9      for (int j = 0; j < m; j++){
      10        vint8mf2_t v = __riscv_vle8_v_i8mf2 (in + i*10 + j*10, 8);
      11        __riscv_vse8_v_i8mf2 (out + i*10 + j*10, v, 8);
      12        for (int k = 0; k < n; k++)
      13          {
      14            vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + i + j + k, 17);
      15            __riscv_vse8_v_i8mf8 (out + i + j + k, v, 17);
      16          }
      17      }
      18    }
      19  }
      20  
      21  /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*8,\s*e8,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      22  /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*17,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */