1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (int8_t * restrict in, int8_t * restrict out, int n, int cond)
       7  {
       8    if (n > cond) {
       9      vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + 600, 5);
      10      vint8mf8_t v2 = __riscv_vle8_v_i8mf8_tu (v, in + 600, 5);
      11      __riscv_vse8_v_i8mf8 (out + 600, v2, 5);
      12    } else {
      13      vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + 700, 5);
      14      __riscv_vse8_v_i8mf8 (out + 700, v, 5);
      15    }
      16  
      17    for (int i = 0 ; i < n * n * n * n; i++) {
      18      vint8mf8_t v = *(vint8mf8_t*) (in + 900 + i);
      19      *(vint8mf8_t*) (out + 900 + i) = v;
      20    }
      21  }
      22  
      23  /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*5,\s*e8,\s*mf8,\s*tu,\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      24  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0"  no-opts "-funroll-loops" no-opts "-g" } } } } */
      25  /* { dg-final { scan-assembler-times {vsetivli} 1 { target { no-opts "-O0"  no-opts "-funroll-loops" no-opts "-g" } } } } */
      26  /* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0"  no-opts "-funroll-loops" no-opts "-g" } } } } */