1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f(void *base, void *out, void *mask_in, size_t vl, size_t m, size_t n) {
       7  
       8    for (size_t i = 0; i < m; i++) {
       9      if (i % 2 == 0) {
      10        for (size_t j = 0; j < n; j++){
      11          if (j % 2 == 0) {
      12            vint8mf8_t v0 = __riscv_vle8_v_i8mf8(base + i + 200 + j, 4);
      13            __riscv_vse8_v_i8mf8 (out + i + 200, v0, 4);
      14          } else {
      15            vint8mf8_t v0 = __riscv_vle8_v_i8mf8(base + i + 300 + j, 4);
      16            __riscv_vse8_v_i8mf8 (out + i + 300, v0, 4);
      17          }
      18        }
      19      } else {
      20        for (size_t j = 0; j < vl; j++){
      21          if (j % 2 == 0) {
      22            for (size_t k = 0; k < n; k++) {
      23              vint8mf8_t v0 = __riscv_vle8_v_i8mf8(base + i + 500 + k + j, 4);
      24              vint8mf8_t v1 = __riscv_vle8_v_i8mf8_tu(v0, base + i + 600 + k + j, 4);
      25              __riscv_vse8_v_i8mf8 (out + i + 600, v1, 4);
      26            }
      27          } else {
      28            vint8mf8_t v0 = __riscv_vle8_v_i8mf8(base + i + 700, 4);
      29            __riscv_vse8_v_i8mf8 (out + i + 800, v0, 4);
      30          }
      31        }
      32      }
      33    }
      34  }
      35  
      36  /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*4,\s*e8,\s*mf8,\s*tu,\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      37  /* { dg-final { scan-assembler-times {vsetivli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */