1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f(void *base, void *out, void *mask_in, size_t vl, size_t m, size_t n) {
       7  
       8    for (size_t i = 0; i < m; i++) {
       9      if (i % 2 == 0) {
      10        for (size_t j = 0; j < n; j++){
      11          vint8mf8_t v0 = __riscv_vle8_v_i8mf8(base + i + j + 700, 4);
      12          vint8mf8_t v1 = __riscv_vle8_v_i8mf8_tu(v0, base + i + j + 700, 4);
      13          __riscv_vse8_v_i8mf8 (out + i + j + 700, v1, 4);
      14          if (j % 2 == 0) {
      15            vint8mf8_t v0 = __riscv_vle8_v_i8mf8(base + i + j + 500, 4);
      16            __riscv_vse8_v_i8mf8 (out + i + j + 500, v0, 4);
      17          } else {
      18            vint16mf4_t v0 = __riscv_vle16_v_i16mf4(base + i + j + 600, 4);
      19            __riscv_vse16_v_i16mf4 (out + i + j + 600, v0, 4);
      20          }
      21        }
      22      } else {
      23        for (size_t j = 0; j < n; j++){
      24          vint8mf8_t v0 = __riscv_vle8_v_i8mf8(base + i + j + 200, 4);
      25          vint8mf8_t v1 = __riscv_vle8_v_i8mf8_tu(v0, base + i + j + 300, 4);
      26          __riscv_vse8_v_i8mf8 (out + i + j + 400, v1, 4);
      27        }
      28      }
      29    }
      30  }
      31  
      32  /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*4,\s*e8,\s*mf8,\s*tu,\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      33  /* { dg-final { scan-assembler-times {vsetivli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */