1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  
       7  double f0 (int8_t * restrict in, int8_t * restrict out, int n, int m, unsigned cond, size_t vl, double scalar)
       8  {
       9    vbool32_t mask = *(vbool32_t*) (in + 1000000);
      10    *(vbool32_t*) (out + 1000000) = mask;
      11  
      12    vfloat64m1_t v = *(vfloat64m1_t*)(in + 300000);
      13    for (size_t i = 0; i < n; i++)
      14      {
      15        v = __riscv_vfmv_s_f_f64m1_tu (v, (scalar + i), 3);
      16      }
      17    return __riscv_vfmv_f_s_f64m1_f64 (v);
      18  }
      19  
      20  /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */
      21  /* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */
      22  /* { dg-final { scan-assembler-not {vsetivli} { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */