1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (void * restrict in, void * restrict out, int n, int cond)
       7  {
       8    size_t vl = 101;
       9    for (size_t i = 0; i < n; i++)
      10      {
      11        vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + i, vl);
      12        __riscv_vse8_v_i8mf8 (out + i, v, vl);
      13      }
      14    
      15    for (size_t i = 0; i < n; i++)
      16      {
      17        vbool64_t mask = __riscv_vlm_v_b64 (in + 10000, vl);
      18        vuint8mf8_t index = __riscv_vle8_v_u8mf8 (in + i + 300, vl);
      19        vfloat32mf2_t v = __riscv_vle32_v_f32mf2 (in + i + 30000, vl);
      20        vfloat32mf2_t v2 = __riscv_vluxei8_v_f32mf2_tumu (mask, v, in + i + 200, index, vl);
      21        __riscv_vse32_v_f32mf2 (out + i + 200, v2, vl);
      22      }
      23  }
      24  
      25  /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      26  /* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      27