1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (int8_t * restrict in, int8_t * restrict out, int n, int cond)
       7  {
       8    size_t vl;
       9    asm volatile ("li %0, 101" :"=r" (vl)::"memory");
      10    if (n > cond) {
      11      vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + 600, cond);
      12      vint8mf8_t v2 = __riscv_vle8_v_i8mf8_tu (v, in + 600, cond);
      13      __riscv_vse8_v_i8mf8 (out + 600, v2, cond);
      14    } else {
      15      vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + 700, cond);
      16      __riscv_vse8_v_i8mf8 (out + 700, v, cond);
      17    }
      18  
      19    for (int i = 0 ; i < n * n; i++)
      20      out[i] = out[i] + out[i];
      21    
      22    for (int i = 0 ; i < n * n * n; i++)
      23      out[i] = out[i] * out[i];
      24  
      25    for (int i = 0 ; i < n * n * n * n; i++)
      26      out[i] = out[i] * out[i];
      27    
      28    for (int i = 0 ; i < n * n * n * n; i++) {
      29      vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + 900 + i, cond);
      30      __riscv_vse8_v_i8mf8 (out + 900 + i, v, cond);
      31    }
      32  }
      33  
      34  /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      35  /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */