1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (void * restrict in, void * restrict out, int l, int n, int m, size_t vl)
       7  {
       8    for (int i = 0; i < l; i++){
       9      for (int j = 0; j < m; j++){
      10        for (int k = 0; k < n; k++)
      11          {
      12            vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + i + j, vl);
      13            __riscv_vse8_v_i8mf8 (out + i + j, v, vl);
      14          }
      15      }
      16    }
      17  }
      18  
      19  /* { dg-final { scan-assembler-times {\.L[0-9]+\:\s+vle8\.v\s+v[0-9]+,\s*0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */
      20  /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      21  /* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */