1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f2 (int8_t * restrict in, int8_t * restrict out, int n, int m, unsigned cond, size_t vl)
       7  {
       8    vbool64_t mask = *(vbool64_t*) (in + 1000000);
       9  
      10    vl = 101;
      11    if (cond > 0) {
      12      vint8mf8_t v = __riscv_vle8_v_i8mf8 (in, vl);
      13      __riscv_vse8_v_i8mf8 (out, v, vl);
      14    } else {
      15      vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + 10000, vl);
      16      __riscv_vse8_v_i8mf8 (out + 10000, v, vl);
      17    }
      18      
      19    for (size_t i = 0; i < n; i++)
      20      {
      21        vfloat32mf2_t v = __riscv_vle32_v_f32mf2 ((float *)(in + i + 200), vl);
      22        __riscv_vse32_v_f32mf2 ((float *)(out + i + 200), v, vl);
      23        
      24        vfloat32mf2_t v2 = __riscv_vle32_v_f32mf2_tumu (mask, v, (float *)(in + i + 300), vl);
      25        __riscv_vse32_v_f32mf2_m (mask, (float *)(out + i + 300), v2, vl);
      26      }
      27  }
      28  
      29  /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */
      30  /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */