1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (int8_t * restrict in, int8_t * restrict out, int n, int m, int cond)
       7  {
       8    vbool64_t mask = *(vbool64_t*) (in + 1000000);
       9    for (size_t j = 0; j < m; j++){
      10      
      11      size_t vl = 101;
      12      for (size_t i = 0; i < n; i++)
      13        {
      14          vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + i + j, vl);
      15          __riscv_vse8_v_i8mf8 (out + i, v, vl);
      16        }
      17  
      18      for (size_t i = 0; i < cond; i++)
      19        out[i] = out[i] * out[i];
      20      
      21      vl = 102;
      22      for (size_t i = 0; i < n; i++)
      23        {
      24          vfloat32mf2_t v = __riscv_vle32_v_f32mf2 ((float *)(in + i + j + 200), vl);
      25          __riscv_vse32_v_f32mf2 ((float *)(out + i + j + 200), v, vl);
      26          
      27          vfloat32mf2_t v2 = __riscv_vle32_v_f32mf2_tumu (mask, v, (float *)(in + i + j + 300), vl);
      28          __riscv_vse32_v_f32mf2_m (mask, (float *)(out + i + j + 300), v2, vl);
      29        }
      30    }
      31  }
      32  
      33  /* { dg-final { scan-assembler {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]} { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      34  /* { dg-final { scan-assembler {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu} { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      35  /* { dg-final { scan-assembler-times {li\s+[a-x0-9]+,101} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      36  /* { dg-final { scan-assembler-times {li\s+[a-x0-9]+,102} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */