1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (int8_t * restrict in, int8_t * restrict out, int n, int cond)
       7  {
       8    if (cond == 2) {
       9      size_t vl = 101;
      10      vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + 900, vl);
      11      __riscv_vse8_v_i8mf8 (out + 900, v, vl);
      12      vl = 102;
      13      vint8mf8_t v2 = __riscv_vle8_v_i8mf8_tu (v, in + 1000, vl);
      14      __riscv_vse8_v_i8mf8 (out + 1000, v2, vl);
      15    }
      16  }
      17  
      18  /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      19  /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */