1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
       3  
       4  #include "riscv_vector.h"
       5  
       6  void f (void * restrict in, void * restrict out, int n)
       7  {
       8    size_t vl = 39;
       9    for (int i = 0; i < n; i++)
      10      {
      11        vint8mf8_t v = __riscv_vle8_v_i8mf8 (in + i, vl);
      12        __riscv_vse8_v_i8mf8 (out + i, v, vl);
      13        
      14        vint8mf8_t v2 = __riscv_vle8_v_i8mf8_tu (v, in + i + 100, vl);
      15        __riscv_vse8_v_i8mf8 (out + i + 100, v2, vl);
      16      }
      17  }
      18  
      19  /* { dg-final { scan-assembler-times {\.L[0-9]+\:\s+vle8\.v\s+v[0-9]+,\s*0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */
      20  /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
      21  /* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */