1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
       3  /* { dg-final { check-function-bodies "**" "" } } */
       4  #include "riscv_vector.h"
       5  
       6  /*
       7  ** f1:
       8  **	vsetivli\tzero,4,e32,m1,tu,ma
       9  **	vle32\.v\tv[0-9]+,0\([a-x0-9]+\)
      10  **	vle32\.v\tv[0-9]+,0\([a-x0-9]+\)
      11  **	vfma[c-d][c-d]\.vf\tv[0-9]+,\s*[a-x0-9]+,\s*v[0-9]+
      12  **	vfma[c-d][c-d]\.vf\tv[0-9]+,\s*[a-x0-9]+,\s*v[0-9]+
      13  **	vse32\.v\tv[0-9]+,0\([a-x0-9]+\)
      14  **	ret
      15  */
      16  void f1 (void * in, void * in2, void *out, float x)
      17  {
      18      vfloat32m1_t v = __riscv_vle32_v_f32m1 (in, 4);
      19      vfloat32m1_t v2 = __riscv_vle32_v_f32m1 (in2, 4);
      20      vfloat32m1_t v3 = __riscv_vfmacc_vf_f32m1 (v, x, v2, 4);
      21      vfloat32m1_t v4 = __riscv_vfmacc_vf_f32m1_tu (v3, x, v2, 4);
      22      __riscv_vse32_v_f32m1 (out, v4, 4);
      23  }
      24  
      25  /*
      26  ** f2:
      27  **	vsetvli\t[a-x0-9]+,zero,e8,mf4,ta,ma
      28  **	vlm.v\tv[0-9]+,0\([a-x0-9]+\)
      29  **	vsetivli\tzero,4,e32,m1,tu,ma
      30  **	vle32.v\tv[0-9]+,0\([a-x0-9]+\),v0.t
      31  **	vle32.v\tv[0-9]+,0\([a-x0-9]+\)
      32  **	vfma[c-d][c-d]\.vf\tv[0-9]+,\s*[a-x0-9]+,\s*v[0-9]+
      33  **	vfma[c-d][c-d]\.vf\tv[0-9]+,\s*[a-x0-9]+,\s*v[0-9]+
      34  **	vse32.v\tv[0-9]+,0\([a-x0-9]+\)
      35  **	ret
      36  */
      37  void f2 (void * in, void * in2, void *out, float x)
      38  {
      39      vbool32_t mask = *(vbool32_t*)in;
      40      asm volatile ("":::"memory");
      41      vfloat32m1_t v = __riscv_vle32_v_f32m1 (in, 4);
      42      vfloat32m1_t v2 = __riscv_vle32_v_f32m1_m (mask, in2, 4);
      43      vfloat32m1_t v3 = __riscv_vfmacc_vf_f32m1 (v, x, v2, 4);
      44      vfloat32m1_t v4 = __riscv_vfmacc_vf_f32m1_tu (v3, x, v2, 4);
      45      __riscv_vse32_v_f32m1 (out, v4, 4);
      46  }
      47  
      48  /*
      49  ** f3:
      50  **	vsetvli\t[a-x0-9]+,zero,e8,mf4,ta,ma
      51  **	vlm.v\tv[0-9]+,0\([a-x0-9]+\)
      52  **	vsetivli\tzero,4,e32,m1,tu,mu
      53  **	vle32.v\tv[0-9]+,0\([a-x0-9]+\),v0.t
      54  **	vle32.v\tv[0-9]+,0\([a-x0-9]+\)
      55  **	vfma[c-d][c-d]\.vf\tv[0-9]+,\s*[a-x0-9]+,\s*v[0-9]+
      56  **	vfma[c-d][c-d]\.vf\tv[0-9]+,\s*[a-x0-9]+,\s*v[0-9]+,v0.t
      57  **	vse32.v\tv[0-9]+,0\([a-x0-9]+\)
      58  **	ret
      59  */
      60  void f3 (void * in, void * in2, void *out, float x)
      61  {
      62      vbool32_t mask = *(vbool32_t*)in;
      63      asm volatile ("":::"memory");
      64      vfloat32m1_t v = __riscv_vle32_v_f32m1 (in, 4);
      65      vfloat32m1_t v2 = __riscv_vle32_v_f32m1_m (mask, in2, 4);
      66      vfloat32m1_t v3 = __riscv_vfmacc_vf_f32m1 (v, x, v2, 4);
      67      vfloat32m1_t v4 = __riscv_vfmacc_vf_f32m1_tumu (mask, v3, x, v2, 4);
      68      __riscv_vse32_v_f32m1 (out, v4, 4);
      69  }
      70  
      71  /* { dg-final { scan-assembler-not {vmv} } } */