1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
       3  /* { dg-final { check-function-bodies "**" "" } } */
       4  #include "riscv_vector.h"
       5  
       6  /*
       7  ** f1:
       8  **	vsetivli\tzero,4,e32,m1,ta,ma
       9  **	vle32\.v\tv[0-9]+,0\([a-x0-9]+\)
      10  **	vle32\.v\tv[0-9]+,0\([a-x0-9]+\)
      11  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      12  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      13  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      14  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      15  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      16  **	vse32\.v\tv[0-9]+,0\([a-x0-9]+\)
      17  **	ret
      18  */
      19  void f1 (void * in, void * in2, void *out)
      20  {
      21      vfloat32m1_t v = __riscv_vle32_v_f32m1 (in, 4);
      22      vfloat32m1_t v2 = __riscv_vle32_v_f32m1 (in2, 4);
      23      vfloat32m1_t v3 = __riscv_vfmadd_vv_f32m1 (v, v2, v2, 4);
      24      vfloat32m1_t v4 = __riscv_vfmadd_vv_f32m1(v3, v2, v2, 4);
      25      v4 = __riscv_vfmadd_vv_f32m1 (v4, v2, v2, 4);
      26      v4 = __riscv_vfmadd_vv_f32m1 (v4, v2, v2, 4);
      27      v4 = __riscv_vfmadd_vv_f32m1 (v4, v2, v2, 4);
      28      __riscv_vse32_v_f32m1 (out, v4, 4);
      29  }
      30  
      31  /*
      32  ** f2:
      33  **	vsetivli\tzero,4,e32,m1,tu,ma
      34  **	vle32\.v\tv[0-9]+,0\([a-x0-9]+\)
      35  **	vle32\.v\tv[0-9]+,0\([a-x0-9]+\)
      36  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      37  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      38  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      39  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      40  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+
      41  **	vse32\.v\tv[0-9]+,0\([a-x0-9]+\)
      42  **	ret
      43  */
      44  void f2 (void * in, void * in2, void *out)
      45  {
      46      vfloat32m1_t v = __riscv_vle32_v_f32m1 (in, 4);
      47      vfloat32m1_t v2 = __riscv_vle32_v_f32m1 (in2, 4);
      48      vfloat32m1_t v3 = __riscv_vfmadd_vv_f32m1_tu (v, v2, v2, 4);
      49      vfloat32m1_t v4 = __riscv_vfmadd_vv_f32m1_tu(v3, v2, v2, 4);
      50      v4 = __riscv_vfmadd_vv_f32m1_tu (v4, v2, v2, 4);
      51      v4 = __riscv_vfmadd_vv_f32m1_tu (v4, v2, v2, 4);
      52      v4 = __riscv_vfmadd_vv_f32m1_tu (v4, v2, v2, 4);
      53      __riscv_vse32_v_f32m1 (out, v4, 4);
      54  }
      55  
      56  /*
      57  ** f3:
      58  **	vsetivli\tzero,4,e32,m1,ta,ma
      59  **	vlm\.v\tv[0-9]+,0\([a-x0-9]+\)
      60  **	vle32\.v\tv[0-9]+,0\([a-x0-9]+\)
      61  **	vle32\.v\tv[0-9]+,0\([a-x0-9]+\)
      62  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,v0.t
      63  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,v0.t
      64  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,v0.t
      65  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,v0.t
      66  **	vfma[c-d][c-d]\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+,v0.t
      67  **	vse32\.v\tv[0-9]+,0\([a-x0-9]+\)
      68  **	ret
      69  */
      70  void f3 (void * in, void * in2, void * in3, void *out)
      71  {
      72      vbool32_t m = __riscv_vlm_v_b32 (in3, 4);
      73      vfloat32m1_t v = __riscv_vle32_v_f32m1 (in, 4);
      74      vfloat32m1_t v2 = __riscv_vle32_v_f32m1 (in2, 4);
      75      vfloat32m1_t v3 = __riscv_vfmadd_vv_f32m1_m (m, v, v2, v2, 4);
      76      vfloat32m1_t v4 = __riscv_vfmadd_vv_f32m1_m(m, v3, v2, v2, 4);
      77      v4 = __riscv_vfmadd_vv_f32m1_m (m, v4, v2, v2, 4);
      78      v4 = __riscv_vfmadd_vv_f32m1_m (m, v4, v2, v2, 4);
      79      v4 = __riscv_vfmadd_vv_f32m1_m (m, v4, v2, v2, 4);
      80      __riscv_vse32_v_f32m1 (out, v4, 4);
      81  }
      82  
      83  /* { dg-final { scan-assembler-not {vmv} } } */