1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
       3  /* { dg-final { check-function-bodies "**" "" } } */
       4  
       5  #include "riscv_vector.h"
       6  
       7  /* Test tieable of RVV types with same LMUL.  */
       8  /*
       9  ** mov1:
      10  **	vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]
      11  **	vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      12  **	vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      13  **  addi\t[a-x0-9]+,[a-x0-9]+,1
      14  **	vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      15  **  addi\t[a-x0-9]+,[a-x0-9]+,2
      16  **	vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      17  **  ret
      18  */
      19  void mov1 (int8_t *in, int8_t *out, int M)
      20  {
      21    vint8mf2_t v1 = *(vint8mf2_t*)(in);
      22    vint16mf2_t v2 = *(vint16mf2_t*)(in);
      23    vint32mf2_t v3 = *(vint32mf2_t*)(in);
      24    *(vint8mf2_t*)(out) = v1;
      25    *(vint16mf2_t*)(out + 1) = v2;
      26    *(vint32mf2_t*)(out + 2) = v3;
      27  }
      28  
      29  /*
      30  ** mov2:
      31  **	vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]
      32  **	vle8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      33  **	vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      34  **  addi\t[a-x0-9]+,[a-x0-9]+,1
      35  **	vse8\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      36  **  ret
      37  */
      38  void mov2 (int8_t *in, int8_t *out, int M)
      39  {
      40    vint8mf4_t v1 = *(vint8mf4_t*)(in);
      41    vint16mf4_t v2 = *(vint16mf4_t*)(in);
      42    *(vint8mf4_t*)(out) = v1;
      43    *(vint16mf4_t*)(out + 1) = v2;
      44  }