(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
riscv/
rvv/
base/
mov-6.c
       1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
       3  /* { dg-final { check-function-bodies "**" "" } } */
       4  
       5  #include "riscv_vector.h"
       6  
       7  /*
       8  ** mov4:
       9  **	vl1re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      10  **	vs1r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      11  **  ret
      12  */
      13  void mov4 (double *in, double *out)
      14  {
      15    vfloat64m1_t v = *(vfloat64m1_t*)in;
      16    *(vfloat64m1_t*)out = v;
      17  }
      18  
      19  /*
      20  ** mov5:
      21  **	vl2re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      22  **	vs2r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      23  **  ret
      24  */
      25  void mov5 (double *in, double *out)
      26  {
      27    vfloat64m2_t v = *(vfloat64m2_t*)in;
      28    *(vfloat64m2_t*)out = v;
      29  }
      30  
      31  /*
      32  ** mov6:
      33  **	vl4re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      34  **	vs4r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      35  **  ret
      36  */
      37  void mov6 (double *in, double *out)
      38  {
      39    vfloat64m4_t v = *(vfloat64m4_t*)in;
      40    *(vfloat64m4_t*)out = v;
      41  }
      42  
      43  /*
      44  ** mov7:
      45  **	vl8re64\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      46  **	vs8r\.v\s+(?:v[0-9]|v[1-2][0-9]|v3[0-1]),0\s*\([a-x0-9]+\)
      47  **  ret
      48  */
      49  void mov7 (double *in, double *out)
      50  {
      51    vfloat64m8_t v = *(vfloat64m8_t*)in;
      52    *(vfloat64m8_t*)out = v;
      53  }