(root)/
gcc-13.2.0/
gcc/
testsuite/
gcc.target/
riscv/
rvv/
base/
mov-13.c
       1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
       3  
       4  #include "riscv_vector.h" 
       5  
       6  void mov1 (int8_t *in, int8_t *out) 
       7  { 
       8   register vint8mf8_t v1 asm("v1") = *(vint8mf8_t*)in; 
       9   asm volatile ("# %0"::"vr"(v1)); 
      10   register vint8mf8_t v2 asm("v2") = v1;
      11   asm volatile ("#":::"v2"); 
      12   *(vint8mf8_t*)out = v2; 
      13   asm volatile ("# %0"::"vr"(v2)); 
      14  }