1  /* { dg-do compile } */
       2  /* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
       3  /* { dg-final { check-function-bodies "**" "" } } */
       4  
       5  #include "riscv_vector.h" 
       6  
       7  /*
       8  ** mov14:
       9  **	vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]
      10  **	vle32\.v\tv1,0\s*\([a-x0-9]+\)
      11  **	...
      12  **  vmv1r\.v\tv2,v1
      13  **	...
      14  **  ret
      15  */
      16  void mov14 (float *in, float *out) 
      17  { 
      18   register vfloat32mf2_t v1 asm("v1") = *(vfloat32mf2_t*)in; 
      19   asm volatile ("# %0"::"vr"(v1)); 
      20   register vfloat32mf2_t v2 asm("v2") = v1; 
      21   *(vfloat32mf2_t*)out = v2; 
      22   asm volatile ("# %0"::"vr"(v2)); 
      23  }
      24  
      25  /*
      26  ** mov15:
      27  **	vl1re32\.v\tv1,0\s*\([a-x0-9]+\)
      28  **	...
      29  **  vmv1r\.v\tv2,v1
      30  **	...
      31  **  ret
      32  */
      33  void mov15 (float *in, float *out) 
      34  { 
      35   register vfloat32m1_t v1 asm("v1") = *(vfloat32m1_t*)in; 
      36   asm volatile ("# %0"::"vr"(v1)); 
      37   register vfloat32m1_t v2 asm("v2") = v1; 
      38   *(vfloat32m1_t*)out = v2; 
      39   asm volatile ("# %0"::"vr"(v2)); 
      40  }
      41  
      42  /*
      43  ** mov16:
      44  **	vl2re32\.v\tv2,0\s*\([a-x0-9]+\)
      45  **	...
      46  **  vmv2r\.v\tv4,v2
      47  **	...
      48  **  ret
      49  */
      50  void mov16 (float *in, float *out) 
      51  { 
      52   register vfloat32m2_t v2 asm("v2") = *(vfloat32m2_t*)in; 
      53   asm volatile ("# %0"::"vr"(v2)); 
      54   register vfloat32m2_t v4 asm("v4") = v2; 
      55   *(vfloat32m2_t*)out = v4; 
      56   asm volatile ("# %0"::"vr"(v4)); 
      57  }
      58  
      59  /*
      60  ** mov17:
      61  **	vl4re32\.v\tv4,0\s*\([a-x0-9]+\)
      62  **	...
      63  **  vmv4r\.v\tv8,v4
      64  **	...
      65  **  ret
      66  */
      67  void mov17 (float *in, float *out)
      68  { 
      69   register vfloat32m4_t v4 asm("v4") = *(vfloat32m4_t*)in; 
      70   asm volatile ("# %0"::"vr"(v4)); 
      71   register vfloat32m4_t v8 asm("v8") = v4; 
      72   *(vfloat32m4_t*)out = v8; 
      73   asm volatile ("# %0"::"vr"(v8)); 
      74  }
      75  
      76  /*
      77  ** mov18:
      78  **	vl8re32\.v\tv8,0\s*\([a-x0-9]+\)
      79  **	...
      80  **  vmv8r\.v\tv16,v8
      81  **	...
      82  **  ret
      83  */
      84  void mov18 (float *in, float *out) 
      85  { 
      86   register vfloat32m8_t v8 asm("v8") = *(vfloat32m8_t*)in; 
      87   asm volatile ("# %0"::"vr"(v8)); 
      88   register vfloat32m8_t v16 asm("v16") = v8; 
      89   *(vfloat32m8_t*)out = v16; 
      90   asm volatile ("# %0"::"vr"(v16)); 
      91  }
      92  
      93  /*
      94  ** mov19:
      95  **	vl1re64\.v\tv1,0\s*\([a-x0-9]+\)
      96  **	...
      97  **  vmv1r\.v\tv2,v1
      98  **	...
      99  **  ret
     100  */
     101  void mov19 (uint64_t *in, uint64_t *out) 
     102  { 
     103   register vfloat64m1_t v1 asm("v1") = *(vfloat64m1_t*)in; 
     104   asm volatile ("# %0"::"vr"(v1)); 
     105   register vfloat64m1_t v2 asm("v2") = v1; 
     106   *(vfloat64m1_t*)out = v2; 
     107   asm volatile ("# %0"::"vr"(v2)); 
     108  }
     109  
     110  /*
     111  ** mov20:
     112  **	vl2re64\.v\tv2,0\s*\([a-x0-9]+\)
     113  **	...
     114  **  vmv2r\.v\tv4,v2
     115  **	...
     116  **  ret
     117  */
     118  void mov20 (uint64_t *in, uint64_t *out) 
     119  { 
     120   register vfloat64m2_t v2 asm("v2") = *(vfloat64m2_t*)in; 
     121   asm volatile ("# %0"::"vr"(v2)); 
     122   register vfloat64m2_t v4 asm("v4") = v2; 
     123   *(vfloat64m2_t*)out = v4; 
     124   asm volatile ("# %0"::"vr"(v4)); 
     125  }
     126  
     127  /*
     128  ** mov21:
     129  **	vl4re64\.v\tv4,0\s*\([a-x0-9]+\)
     130  **	...
     131  **  vmv4r\.v\tv8,v4
     132  **	...
     133  **  ret
     134  */
     135  void mov21 (uint64_t *in, uint64_t *out) 
     136  { 
     137   register vfloat64m4_t v4 asm("v4") = *(vfloat64m4_t*)in; 
     138   asm volatile ("# %0"::"vr"(v4)); 
     139   register vfloat64m4_t v8 asm("v8") = v4; 
     140   *(vfloat64m4_t*)out = v8; 
     141   asm volatile ("# %0"::"vr"(v8)); 
     142  }
     143  
     144  /*
     145  ** mov22:
     146  **	vl8re64\.v\tv8,0\s*\([a-x0-9]+\)
     147  **	...
     148  **  vmv8r\.v\tv16,v8
     149  **	...
     150  **  ret
     151  */
     152  void mov22 (uint64_t *in, uint64_t *out) 
     153  { 
     154   register vfloat64m8_t v8 asm("v8") = *(vfloat64m8_t*)in; 
     155   asm volatile ("# %0"::"vr"(v8)); 
     156   register vfloat64m8_t v16 asm("v16") = v8; 
     157   *(vfloat64m8_t*)out = v16; 
     158   asm volatile ("# %0"::"vr"(v16)); 
     159  }