1 /* { dg-do compile } */
2 /* { dg-options "-march=rv32gcv -mabi=ilp32d -O3 -fno-schedule-insns -fno-schedule-insns2" } */
3 /* { dg-final { check-function-bodies "**" "" } } */
4
5 #include "riscv_vector.h"
6
7 /*
8 ** mov1:
9 ** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]
10 ** vle8\.v\tv1,0\s*\([a-x0-9]+\)
11 ** ...
12 ** vmv1r\.v\tv2,v1
13 ** ...
14 ** ret
15 */
16 void mov1 (int8_t *in, int8_t *out)
17 {
18 register vint8mf8_t v1 asm("v1") = *(vint8mf8_t*)in;
19 asm volatile ("# %0"::"vr"(v1));
20 register vint8mf8_t v2 asm("v2") = v1;
21 *(vint8mf8_t*)out = v2;
22 asm volatile ("# %0"::"vr"(v2));
23 }
24
25 /*
26 ** mov2:
27 ** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf4,\s*t[au],\s*m[au]
28 ** vle8\.v\tv1,0\s*\([a-x0-9]+\)
29 ** ...
30 ** vmv1r\.v\tv2,v1
31 ** ...
32 ** ret
33 */
34 void mov2 (int8_t *in, int8_t *out)
35 {
36 register vint8mf4_t v1 asm("v1") = *(vint8mf4_t*)in;
37 asm volatile ("# %0"::"vr"(v1));
38 register vint8mf4_t v2 asm("v2") = v1;
39 *(vint8mf4_t*)out = v2;
40 asm volatile ("# %0"::"vr"(v2));
41 }
42
43 /*
44 ** mov3:
45 ** vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf2,\s*t[au],\s*m[au]
46 ** vle8\.v\tv1,0\s*\([a-x0-9]+\)
47 ** ...
48 ** vmv1r\.v\tv2,v1
49 ** ...
50 ** ret
51 */
52 void mov3 (int8_t *in, int8_t *out)
53 {
54 register vint8mf2_t v1 asm("v1") = *(vint8mf2_t*)in;
55 asm volatile ("# %0"::"vr"(v1));
56 register vint8mf2_t v2 asm("v2") = v1;
57 *(vint8mf2_t*)out = v2;
58 asm volatile ("# %0"::"vr"(v2));
59 }
60
61 /*
62 ** mov4:
63 ** vl1re8\.v\tv1,0\s*\([a-x0-9]+\)
64 ** ...
65 ** vmv1r\.v\tv2,v1
66 ** ...
67 ** ret
68 */
69 void mov4 (int8_t *in, int8_t *out)
70 {
71 register vint8m1_t v1 asm("v1") = *(vint8m1_t*)in;
72 asm volatile ("# %0"::"vr"(v1));
73 register vint8m1_t v2 asm("v2") = v1;
74 *(vint8m1_t*)out = v2;
75 asm volatile ("# %0"::"vr"(v2));
76 }
77
78 /*
79 ** mov5:
80 ** vl2re8\.v\tv2,0\s*\([a-x0-9]+\)
81 ** ...
82 ** vmv2r\.v\tv4,v2
83 ** ...
84 ** ret
85 */
86 void mov5 (int8_t *in, int8_t *out)
87 {
88 register vint8m2_t v2 asm("v2") = *(vint8m2_t*)in;
89 asm volatile ("# %0"::"vr"(v2));
90 register vint8m2_t v4 asm("v4") = v2;
91 *(vint8m2_t*)out = v4;
92 asm volatile ("# %0"::"vr"(v4));
93 }
94
95 /*
96 ** mov6:
97 ** vl4re8\.v\tv4,0\s*\([a-x0-9]+\)
98 ** ...
99 ** vmv4r\.v\tv8,v4
100 ** ...
101 ** ret
102 */
103 void mov6 (int8_t *in, int8_t *out)
104 {
105 register vint8m4_t v4 asm("v4") = *(vint8m4_t*)in;
106 asm volatile ("# %0"::"vr"(v4));
107 register vint8m4_t v8 asm("v8") = v4;
108 *(vint8m4_t*)out = v8;
109 asm volatile ("# %0"::"vr"(v8));
110 }
111
112 /*
113 ** mov7:
114 ** vl8re8\.v\tv8,0\s*\([a-x0-9]+\)
115 ** ...
116 ** vmv8r\.v\tv16,v8
117 ** ...
118 ** ret
119 */
120 void mov7 (int8_t *in, int8_t *out)
121 {
122 register vint8m8_t v8 asm("v8") = *(vint8m8_t*)in;
123 asm volatile ("# %0"::"vr"(v8));
124 register vint8m8_t v16 asm("v16") = v8;
125 *(vint8m8_t*)out = v16;
126 asm volatile ("# %0"::"vr"(v16));
127 }
128
129 /*
130 ** mov8:
131 ** vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]
132 ** vle16\.v\tv1,0\s*\([a-x0-9]+\)
133 ** ...
134 ** vmv1r\.v\tv2,v1
135 ** ...
136 ** ret
137 */
138 void mov8 (int16_t *in, int16_t *out)
139 {
140 register vint16mf4_t v1 asm("v1") = *(vint16mf4_t*)in;
141 asm volatile ("# %0"::"vr"(v1));
142 register vint16mf4_t v2 asm("v2") = v1;
143 *(vint16mf4_t*)out = v2;
144 asm volatile ("# %0"::"vr"(v2));
145 }
146
147 /*
148 ** mov9:
149 ** vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]
150 ** vle16\.v\tv1,0\s*\([a-x0-9]+\)
151 ** ...
152 ** vmv1r\.v\tv2,v1
153 ** ...
154 ** ret
155 */
156 void mov9 (int16_t *in, int16_t *out)
157 {
158 register vint16mf2_t v1 asm("v1") = *(vint16mf2_t*)in;
159 asm volatile ("# %0"::"vr"(v1));
160 register vint16mf2_t v2 asm("v2") = v1;
161 *(vint16mf2_t*)out = v2;
162 asm volatile ("# %0"::"vr"(v2));
163 }
164
165 /*
166 ** mov10:
167 ** vl1re16\.v\tv1,0\s*\([a-x0-9]+\)
168 ** ...
169 ** vmv1r\.v\tv2,v1
170 ** ...
171 ** ret
172 */
173 void mov10 (int16_t *in, int16_t *out)
174 {
175 register vint16m1_t v1 asm("v1") = *(vint16m1_t*)in;
176 asm volatile ("# %0"::"vr"(v1));
177 register vint16m1_t v2 asm("v2") = v1;
178 *(vint16m1_t*)out = v2;
179 asm volatile ("# %0"::"vr"(v2));
180 }
181
182 /*
183 ** mov11:
184 ** vl2re16\.v\tv2,0\s*\([a-x0-9]+\)
185 ** ...
186 ** vmv2r\.v\tv4,v2
187 ** ...
188 ** ret
189 */
190 void mov11 (int16_t *in, int16_t *out)
191 {
192 register vint16m2_t v2 asm("v2") = *(vint16m2_t*)in;
193 asm volatile ("# %0"::"vr"(v2));
194 register vint16m2_t v4 asm("v4") = v2;
195 *(vint16m2_t*)out = v4;
196 asm volatile ("# %0"::"vr"(v4));
197 }
198
199 /*
200 ** mov12:
201 ** vl4re16\.v\tv4,0\s*\([a-x0-9]+\)
202 ** ...
203 ** vmv4r\.v\tv8,v4
204 ** ...
205 ** ret
206 */
207 void mov12 (int16_t *in, int16_t *out)
208 {
209 register vint16m4_t v4 asm("v4") = *(vint16m4_t*)in;
210 asm volatile ("# %0"::"vr"(v4));
211 register vint16m4_t v8 asm("v8") = v4;
212 *(vint16m4_t*)out = v8;
213 asm volatile ("# %0"::"vr"(v8));
214 }
215
216 /*
217 ** mov13:
218 ** vl8re16\.v\tv8,0\s*\([a-x0-9]+\)
219 ** ...
220 ** vmv8r\.v\tv16,v8
221 ** ...
222 ** ret
223 */
224 void mov13 (int32_t *in, int32_t *out)
225 {
226 register vint16m8_t v8 asm("v8") = *(vint16m8_t*)in;
227 asm volatile ("# %0"::"vr"(v8));
228 register vint16m8_t v16 asm("v16") = v8;
229 *(vint16m8_t*)out = v16;
230 asm volatile ("# %0"::"vr"(v16));
231 }
232
233 /*
234 ** mov14:
235 ** vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]
236 ** vle32\.v\tv1,0\s*\([a-x0-9]+\)
237 ** ...
238 ** vmv1r\.v\tv2,v1
239 ** ...
240 ** ret
241 */
242 void mov14 (int32_t *in, int32_t *out)
243 {
244 register vint32mf2_t v1 asm("v1") = *(vint32mf2_t*)in;
245 asm volatile ("# %0"::"vr"(v1));
246 register vint32mf2_t v2 asm("v2") = v1;
247 *(vint32mf2_t*)out = v2;
248 asm volatile ("# %0"::"vr"(v2));
249 }
250
251 /*
252 ** mov15:
253 ** vl1re32\.v\tv1,0\s*\([a-x0-9]+\)
254 ** ...
255 ** vmv1r\.v\tv2,v1
256 ** ...
257 ** ret
258 */
259 void mov15 (int32_t *in, int32_t *out)
260 {
261 register vint32m1_t v1 asm("v1") = *(vint32m1_t*)in;
262 asm volatile ("# %0"::"vr"(v1));
263 register vint32m1_t v2 asm("v2") = v1;
264 *(vint32m1_t*)out = v2;
265 asm volatile ("# %0"::"vr"(v2));
266 }
267
268 /*
269 ** mov16:
270 ** vl2re32\.v\tv2,0\s*\([a-x0-9]+\)
271 ** ...
272 ** vmv2r\.v\tv4,v2
273 ** ...
274 ** ret
275 */
276 void mov16 (int32_t *in, int32_t *out)
277 {
278 register vint32m2_t v2 asm("v2") = *(vint32m2_t*)in;
279 asm volatile ("# %0"::"vr"(v2));
280 register vint32m2_t v4 asm("v4") = v2;
281 *(vint32m2_t*)out = v4;
282 asm volatile ("# %0"::"vr"(v4));
283 }
284
285 /*
286 ** mov17:
287 ** vl4re32\.v\tv4,0\s*\([a-x0-9]+\)
288 ** ...
289 ** vmv4r\.v\tv8,v4
290 ** ...
291 ** ret
292 */
293 void mov17 (int32_t *in, int32_t *out)
294 {
295 register vint32m4_t v4 asm("v4") = *(vint32m4_t*)in;
296 asm volatile ("# %0"::"vr"(v4));
297 register vint32m4_t v8 asm("v8") = v4;
298 *(vint32m4_t*)out = v8;
299 asm volatile ("# %0"::"vr"(v8));
300 }
301
302 /*
303 ** mov18:
304 ** vl8re32\.v\tv8,0\s*\([a-x0-9]+\)
305 ** ...
306 ** vmv8r\.v\tv16,v8
307 ** ...
308 ** ret
309 */
310 void mov18 (int32_t *in, int32_t *out)
311 {
312 register vint32m8_t v8 asm("v8") = *(vint32m8_t*)in;
313 asm volatile ("# %0"::"vr"(v8));
314 register vint32m8_t v16 asm("v16") = v8;
315 *(vint32m8_t*)out = v16;
316 asm volatile ("# %0"::"vr"(v16));
317 }
318
319 /*
320 ** mov19:
321 ** vl1re64\.v\tv1,0\s*\([a-x0-9]+\)
322 ** ...
323 ** vmv1r\.v\tv2,v1
324 ** ...
325 ** ret
326 */
327 void mov19 (int64_t *in, int64_t *out)
328 {
329 register vint64m1_t v1 asm("v1") = *(vint64m1_t*)in;
330 asm volatile ("# %0"::"vr"(v1));
331 register vint64m1_t v2 asm("v2") = v1;
332 *(vint64m1_t*)out = v2;
333 asm volatile ("# %0"::"vr"(v2));
334 }
335
336 /*
337 ** mov20:
338 ** vl2re64\.v\tv2,0\s*\([a-x0-9]+\)
339 ** ...
340 ** vmv2r\.v\tv4,v2
341 ** ...
342 ** ret
343 */
344 void mov20 (int64_t *in, int64_t *out)
345 {
346 register vint64m2_t v2 asm("v2") = *(vint64m2_t*)in;
347 asm volatile ("# %0"::"vr"(v2));
348 register vint64m2_t v4 asm("v4") = v2;
349 *(vint64m2_t*)out = v4;
350 asm volatile ("# %0"::"vr"(v4));
351 }
352
353 /*
354 ** mov21:
355 ** vl4re64\.v\tv4,0\s*\([a-x0-9]+\)
356 ** ...
357 ** vmv4r\.v\tv8,v4
358 ** ...
359 ** ret
360 */
361 void mov21 (int64_t *in, int64_t *out)
362 {
363 register vint64m4_t v4 asm("v4") = *(vint64m4_t*)in;
364 asm volatile ("# %0"::"vr"(v4));
365 register vint64m4_t v8 asm("v8") = v4;
366 *(vint64m4_t*)out = v8;
367 asm volatile ("# %0"::"vr"(v8));
368 }
369
370 /*
371 ** mov22:
372 ** vl8re64\.v\tv8,0\s*\([a-x0-9]+\)
373 ** ...
374 ** vmv8r\.v\tv16,v8
375 ** ...
376 ** ret
377 */
378 void mov22 (int64_t *in, int64_t *out)
379 {
380 register vint64m8_t v8 asm("v8") = *(vint64m8_t*)in;
381 asm volatile ("# %0"::"vr"(v8));
382 register vint64m8_t v16 asm("v16") = v8;
383 *(vint64m8_t*)out = v16;
384 asm volatile ("# %0"::"vr"(v16));
385 }